April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
DesignCon 2022 Schedule Builder
Welcome to the DesignCon 2022 agenda and presentation download site. Here you can view and download conference, Chiphead Theater, and other event presentations before, during, and after the event. If you're looking for a presentation from a specific session that you're unable to find here, it is likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalog of available presentations.
Jianting Li, Analog Engineer, Intel
Jianting Li is an analog engineer at Intel, working on Signal integrity for PCIe interface.
His work focuses on the model, package, and board analysis for latest PCIe technology.
Prior to Intel, he works as Power integrity and Signal integrity engineer in Huawei and
Celestica.
Presenting:
