April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
DesignCon 2022 Schedule Builder
Welcome to the DesignCon 2022 agenda and presentation download site. Here you can view and download conference, Chiphead Theater, and other event presentations before, during, and after the event. If you're looking for a presentation from a specific session that you're unable to find here, it is likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalog of available presentations.
Mike Li, Fellow, Intel
Dr. Mike Peng Li is a fellow at Intel Corporation. He is a corporate expert and adviser on jitter, noise, signal integrity, high-speed link, SERDES and on-die instrumentation (ODI), electrical and optical signaling, silicon photonics, and optical FPGA. Dr. Li was the Chief Technology Officer (CTO) for Wavecrest Corporation from 2000-2007, where he led the technology roadmap, leadership, vision, and product developments.
Presenting:
- 224Gbps-PAM4 End-to-end Channel Solutions for High-density Networking System
- Current Limitation & New Method to Accurately Estimate Reference Signal Jitter for 100+ Gbps 802.3 & OIF/CEI Interference Tolerance Test
- Next Generation 224Gbps-PAM4 SERDES, Channel & Link Systems
- Panel – OIF Electrical I/O Specifications: Progress on CEI 112Gbps & 224Gbps
- Panel – The Case of the Closing Eyes: PAM-N, What Can be Tested?
- Receiver Calibration & Testing Methodologies Comparison for PAM-4 IOs
- Transmitter Jitter Measurement Methodologies for PAM-4 IOs
- Tutorial – Design & Verification for High-Speed I/Os at 10 to 112 & 224Gbps with Jitter, Signal Integrity & Power Optimized
