April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
DesignCon 2022 Schedule Builder
Welcome to the DesignCon 2022 agenda and presentation download site. Here you can view and download conference, Chiphead Theater, and other event presentations before, during, and after the event. If you're looking for a presentation from a specific session that you're unable to find here, it is likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalog of available presentations.
Stas Litski, Team Leader of the Signal and Power Integrity
Stas Litski is a team leader of the Signal and Power Integrity team at Intel Analog Mixed Signal division, responsible for development, design, simulation and measurement of package and boards for validation of next generation Intel HSIOs IPs such as 112Gbps and 224Gbps. He was responsible for design and simulation of validation boards for Thunderbolt 1 and 2 SoCs.
Presenting:
