designcon is part of the Informa Markets Division of Informa PLC
This site is operated by a business or businesses owned by Informa PLC and all copyright resides with them. Informa PLC's registered office is 5 Howick Place, London SW1P 1WG. Registered in England and Wales. Number 8860726.
April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
Richard Mellitz is presently a Distinguished Engineer at Samtec, supporting interconnect signal integrity and industry standards. Prior to this, he was a Principal Engineer in the Platform Engineering Group at Intel. Richard was a principal member of various Intel processor and I/O bus teams including ItaniumÂ®, PentiumÂ®, PCI ExpressÂ®, SASÂ®, and Fabric (Ethernet, IB, and proprietary). Additionally, he has been a key contributor for the channel sections IEEE802.3 backplane and cabling standards, and for the Time domain ISI analysis for IEEE802.3 Ethernet, known as COM (Channel Operating Margin), which is now an integral part of Ethernet standards due to Richâ€™s leadership. He founded and chaired an IPC (Association Connecting Electronics Industries) committee delivering IPCâ€™s first PCB loss test method. Prior to this, Rich led industry efforts at IPC to deliver the first TDR (time domain reflectometry) standard which is presently used throughout the PCB industry. Richard holds many patents in interconnect, signal integrity, design, and test. He has delivered numerous signal integrity papers at electronic industry design conferences.