April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
DesignCon 2022 Schedule Builder
Welcome to the DesignCon 2022 agenda and presentation download site. Here you can view and download conference, Chiphead Theater, and other event presentations before, during, and after the event. If you're looking for a presentation from a specific session that you're unable to find here, it is likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalog of available presentations.
Karsten Stangel, Analog Engineer, Intel
Karsten Stangel is an analog IO architect at Intel Corporation’s Data Platforms group.
He received his Diploma in Electrical Engineering from the University of Duisburg,
Germany, in 1999. Prior to Intel, Karsten has been with Fraunhofer Institute, and Toshiba
Electronics, Germany, engaged in SerDes design for SDH/Sonet, SATA and PCI Express
applications. At Intel, Karsten held positions in memory architecture research, memory
and voltage regulator analog circuit design, and management. His current focus covers
pathfinding and feasibility of next generation High-Speed IO technologies, development
of standards, specifications, and testing procedures.
Presenting:
