April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
DesignCon 2022 Schedule Builder
Welcome to the DesignCon 2022 agenda and presentation download site. Here you can view and download conference, Chiphead Theater, and other event presentations before, during, and after the event. If you're looking for a presentation from a specific session that you're unable to find here, it is likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalog of available presentations.
Jimin Wen, Principal R&D Engineer, Ansys
Jimin Wen is a Principal R&D engineer and works on power, thermal, and security integrity analysis technologies in Ansys. His research interests also include AI/ML-based EDA solutions for the modern chip-package-system design. Before 2016, Jimin was with Keysight on the high-speed channel and signal integrity simulation. From 2008-2014 he worked at Cadence on RF simulation and wireless verification technologies. Jimin received his Ph.D. in EE from Chinese Academy of Sciences in 2008.
Presenting:
