April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA

Welcome to the DesignCon 2022 agenda and presentation download site. Here you can view and download conference, Chiphead Theater, and other event presentations before, during, and after the event. If you're looking for a presentation from a specific session that you're unable to find here, it is likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalog of available presentations.

Shin WuStaff Digital EngineerNorthrop Grumman

Shin Wu is a Staff Digital Engineer at Northrop Grumman Digital Technology Department. He is a senior member of the ASIC Physical Design team and is currently the Technical Lead for large multi-year ASIC development program at Northrop Grumman. Shin has broad experience in ASIC design from RTL to GDSII design, implementation and sign-off verification including tape-out processing to ASIC foundries. He is a specialist in Static Timing Analysis, IR/EM Analysis, Place & Route, Low Power Design and Physical Verification. Shin is a key contributor to defining, implementing and deploying a common ASIC design implementation flow currently used by multiple ASIC development efforts at Northrop Grumman. Shin has BSEE from University of Maryland and MS in Computer Engineering from Johns Hopkins University.