April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
DesignCon 2022 Schedule Builder
Welcome to the DesignCon 2022 agenda and presentation download site. Here you can view and download conference, Chiphead Theater, and other event presentations before, during, and after the event. If you're looking for a presentation from a specific session that you're unable to find here, it is likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalog of available presentations.
John Yang, Analog Engineer, Intel
John Y Yang is a circuit architect of next generation physical layer link at Intel IO Technology and Standards Group. He works on product development and research of high-speed IO, memory IO, in-package and optics IO. His research interest also includes circuit system modeling, signal and power integrity. He has over 6 patents and 6 publications.
Presenting:
