Welcome to the DesignCon 2020 agenda and presentation download site. Here you can view and download conference and/or Chiphead Theater presentations before, during, and after the event. If you’re looking for a presentation from a specific session that you’re unable to find here, it is likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalogue of available presentations.
Location: Mission City Ballroom
Track: Welcome Breakfast
Format: Networking
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass
Boot Camp – Optical High-Speed Serial Data Measurements for Electrical Engineers
Speakers: Pavel Zivny (Tektronix), Paul Brooks (Viavi)
Location: Great America 2
Track: 03. Integrating Photonics & Wireless in Electrical Design
Format: Boot Camp
Pass Type: All-Access Pass, Alumni All-Access Pass, Boot Camp Pass
Boot Camp – Relating SI & PI for High-Speed Digital Boards: FPGA DDR4 Case Study
Speakers: Jack Carrel (Xilinx), Steve Sandler (Picotest), Heidi Barnes (Keysight)
Location: Ballroom G
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Boot Camp
Pass Type: All-Access Pass, Alumni All-Access Pass, Boot Camp Pass
Boot Camp – Under the Hood: Understand the Software that Drives Electromagnetic Simulation Tools
Speakers: Davi Correia (Carlisle IT), Raul Stavoli (Carlisle IT)
Location: Ballroom F
Track: 13. Modeling & Analysis of Interconnects
Format: Boot Camp
Pass Type: All-Access Pass, Alumni All-Access Pass, Boot Camp Pass
Speaker: Mike Li (Intel)
Location: Ballroom C
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Tutorial – Open-Source Software Tools for Signal Integrity
Speaker: Peter Pupalaikis (Teledyne LeCroy)
Location: Ballroom D
Track: 13. Modeling & Analysis of Interconnects
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Tutorial – Radiated Emissions: Debugging & Pre-Compliance Testing
Speakers: Ken Wyatt (Wyatt Technical Services LLC), Dylan Stinson (Tektronix)
Location: Ballroom B
Track: 11. Electromagnetic Compatibility/Mitigating Interference
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Tutorial – The Absolute Beginner's Guide to RF & Microwave PCB Design
Speaker: Ben Jordan (Altium LLC)
Location: Ballroom A
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Keynote – The Future of Fiber Optic Communications: Datacenter & Mobile
Keynote: Chris Cole (Luminous Computing)
Location: Elizabeth A. Hangs Theater
Track: Keynote
Format: Keynote
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Location: Mission City Ballroom
Track: Conference Networking Lunch
Format: Networking
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass
Speaker: Yuriy Shlepnev (Simberian Inc.)
Authors: Vadim Heyfitch (Xilinx), Eli Zalianski (Intel)
Location: Ballroom C
Track: 13. Modeling & Analysis of Interconnects
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Tutorial – Electronic/Photonic IC Design for 5G RF Applications
Speakers: James Pond (Lumerical), Gilles Lamant (Cadence), Pei-Der Tseng (Cadence Design Systems), Samir Chaudhry (TowerJazz), Rich Goldman (Lumerical), Zeqin Lu (Lumerical)
Location: Ballroom A
Track: 03. Integrating Photonics & Wireless in Electrical Design
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Speakers: Xiaoning Ye (Intel Corp), Jay Diepenbrock (SIRF Consultants, LLC), Heidi Barnes (Keysight), Eric Bogatin (Teledyne LeCroy), Mikheil Tsiklauri (Missouri University of Science and Technology), Jason Ellison (Amphenol), Se-Jung Moon (Intel), Jose Moreira (Advantest), Ching-Chao Huang (AtaiTec Corporation)
Location: Ballroom B
Track: 12. Applying Test & Measurement Methodology
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Tutorial – Signal Integrity: Measurements & Instrumentation
Speakers: Michael Schnecker (Rohde & Schwarz), Jeff Cuyle (Rohde & Schwartz), Rick Daniel (Rohde & Schwarz), Neil Jarvis (Rohde & Schwarz)
Location: Ballroom D
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 12. Applying Test & Measurement Methodology
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Panel – 800G & Beyond: Optical Transceiver Technology
Moderator: Sunil Priyadarshi (Intel)
Panelists: Kapil Shrikhande (Innovium), Ryohei Urata (Google), Near Margalit (Broadcom), Peter De Dobbelaere (Cisco Systems), Scott Schube (Intel), Radha Nagarajan (Inphi)
Location: Ballroom D
Track: 03. Integrating Photonics & Wireless in Electrical Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Panel – The Case of the Closing Eyes: PAM is the Answer, or Not?
Moderator: Cathy Liu (Broadcom)
Panelists: Chris Loberg (Tektronix, Inc.), Mark Marlett (Inphi Corp), Mike Li (Intel), Ransom Stephens (Ransom's Notes), Pavel Zivny (Tektronix), Greg LeCheminant (Keysight Technologies), Hiroshi Goto (Anritsu)
Location: Ballroom F
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Panel – The Cat's Out of the Box: Quantum Computing & Electronic Design
Moderator: Chris Cheng (HP Enterprise)
Panelists: Paul Franzon (North Carolina State University), Daniel Stancil (North Carolina State University), Greg Byrd (North Carolina State University)
Location: Ballroom G
Track: 14. Machine Learning for Microelectronics, Signaling & System Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Welcome Reception - Sponsored by Keysight Technologies
Location: Santa Clara Ballroom, Hyatt Regency
Track: Welcome Reception
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass
Advanced Interconnect Process Enables Very High Density PCB Structures
Speaker: Mike Vinson (Averatek)
Location: Ballroom E
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
IBIS-AMI Back-Channel System Optimization in Practice
Speakers: Steven Parker (Marvell Semiconductor), Jared James (Cadence Design Systems)
Authors: Ambrish Varma (Cadence Design Systems), Dr. Kumar Keshavan (Cadence Design Systems), Ken Willis (Cadence), Matthew Kelly (Marvell Semiconductor)
Location: Ballroom B
Track: 07. Optimizing High-Speed Serial Design, 09. High-Speed Signal Processing, Equalization & Coding
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Industry-Leading High Bandwidth Memory Interface Solutions for Inference/AI
Speaker: Billy Koo (samsung foundry)
Location: Ballroom F
Track: 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
New USB-C Alternate Mode: Design, Optimization & Validation
Speakers: Chia-Yuan Hsieh (NVIDIA), David Chen (NVIDIA)
Authors: Richie Lu (NVIDIA), Jason Tsai (NVIDIA), Norman Chang (NVIDIA), Sunil Sudhakaran (NVIDIA)
Location: Ballroom C
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Preparing to Test & Avoid Pitfalls in Your USB4 Implementations
Speaker: Jit Lim (Keysight Technologies)
Location: Ballroom G
Track: 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Signal Model-Based Approach to a Joint Jitter & Noise Decomposition
Speaker: Adrian Ispas (Rohde & Schwarz)
Authors: Julian Leyh (Rohde & Schwarz), Andreas Maier (Rohde & Schwarz), Bernhard Nitsch (Rohde & Schwarz)
Location: Ballroom A
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
The Hidden Challenges in 112-Gb Channel Design & Modeling
Speakers: Alex Manukovsky (Intel), Roee Bloch (Marvell Semiconductor), Shai Sayfan-Altman (ANSYS)
Location: Ballroom D
Track: 13. Modeling & Analysis of Interconnects, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
DDR5/LPDDR5 Design, Debug, Probing, and Validation Challenges and Solutions
Speakers: Jennie Grosslight (Keysight Technologies), Stephen Slater (Keysight Technologies), Stephanie Rubalcava
Location: Great America 1
Track: Keysight Education Forum
Speaker: Makoto Nagata (Kobe University)
Authors: Norman Chang (Ansys), Akihiro Tsukioka (Kobe Uni), Karthik Srinivasan (Ansys)
Location: Ballroom F
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
A Practical Method for 3D-Modeling of Glass Weave
Speaker: Kenji Nonaka (Sony LSI Design Incorpolated)
Location: Ballroom G
Track: 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Achieving a Robust Power Integrity Solution While Integrating Multiple IPs
Speaker: Praveen Pai (Intel)
Author: Vishram Pandit (Intel)
Location: Ballroom B
Track: 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
DfA (Design for AMI): A New Integrated Workflow for Modeling 56G PAM4 SerDes Systems
Speakers: Richard Allred (MathWorks), Jonggab Kil (Intel), Vijay Kasturi (Intel)
Authors: Ravindra Rudraraju (Intel), Barry Katz (MathWorks), Tripp Worrell (MathWorks), Walter Katz (MathWorks)
Location: Ballroom E
Track: 02. Chip I/O & Power Modeling & Validation Solutions, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
End-to-End System-Level Simulations with Retimers for PCIe Gen5 & CXL: A How-To Guide
Speakers: Casey Morrison (Astera Labs, Inc.), Elene Chobanyan (Hewlett Packard Enterprise), Pegah Alavi (Keysight)
Location: Ballroom D
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
How to Enforce Causality of Standard & "Custom" Metal Roughness Models
Speaker: Vladimir Dmitriev Zdorov (Mentor Graphics)
Location: Ballroom C
Track: 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: Mike Li (Intel), Hsinho Wu (Intel), Masashi Shimanouchi (Intel)
Location: Ballroom A
Track: 09. High-Speed Signal Processing, Equalization & Coding, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Interface Solutions for Revolutionary 5G Wireless Infrastructure
Speaker: Suresh Andani
Location: Great America 3
Track: Sponsored Session
Test Fixture De-embedding and Material Characterization for 40 GHz Delta-L
Speaker: Dr. James Drewniak
Location: Great America 2
Track: Sponsored Session
Signal Integrity Simulation and Measurement Correlation: Getting Smart with Beatty Standard
Speakers: Mike Resso (Keysight Technologies), Chun-ting "Tim" Wang Lee (Keysight Technologies)
Location: Great America 1
Track: Keysight Education Forum
Keynote – Design for Security: The Next Frontier of Smart Silicon
Keynote: Warren Savage (University of Maryland)
Location: Elizabeth A. Hangs Theater
Track: Keynote
Format: Keynote
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Be prepared to test next-gen Type-C technologies – eUSB2, USB 3.2, and USB4
Speaker: Jit Lim (Keysight Technologies)
Location: Great America 1
Track: Keysight Education Forum
Design of Tomlinson-Harashima Precoder for 112G-PAM4 XSR Applications
Speakers: Daniel Wu (Xilinx Inc), Valery Kugel (Juniper Networks), Geoffrey Zhang (Xilinx Inc)
Location: Ballroom B
Track: 09. High-Speed Signal Processing, Equalization & Coding, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Leveraging IBIS-AMI Simulations for Optimized Architectural Design in PCIe5 PHY
Speaker: Priyank Shukla (Synopsys)
Authors: Kevin (Kai) Li (Synopsys), Jianguo Zhou (Synopsys), Christian de Verteuil (Synopsys)
Location: Ballroom D
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
PCI Express 5.0 Solution Extending Study Through PCB Stackup & Geometry Optimization
Speakers: Harrison Fei Xue (Intel), Yanwu Wang (Intel)
Author: Xinjun Zhang (Intel)
Location: Ballroom F
Track: 07. Optimizing High-Speed Serial Design, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Prediction of Power Supply Induced Jitter in DDR Interfaces
Speaker: Licheng Wu (NXP Semiconductors)
Location: Ballroom A
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
QPRBS31 Correlated Error Analysis in 56G PAM4 FEC Systems
Speakers: Amanda (Xiaoqing) Dong (Xilinx), Bi Yi (ZTE), Nick (Chunxing) Huang (Shenzhen Zhongzeling Electronics), Geoff (Geoffrey) Zhang (,Xilinx)
Location: Ballroom G
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 09. High-Speed Signal Processing, Equalization & Coding
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speaker: HYO-SOON KANG (Intel Corporation)
Authors: Wendem Beyene (Intel Corporation), Ling Yu (Intel Corporation)
Location: Ballroom C
Track: 02. Chip I/O & Power Modeling & Validation Solutions, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
The SI/PI Modeling & Measurement of Memory System by Probing on Top of DRAM Package
Speakers: WonSuk Choi (Samsung Electronics), SangKeun Kwak (Samsung Electronics)
Location: Ballroom E
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Chiplet Architecture Interface Alternatives
Speaker: Saman Sadr (Rambus)
Location: Great America 3
Track: Sponsored Session
PCI Express Rockets Forward to 64GT/s: Phy Layer Testing Challenges at 32G NRZ and 64G PAM4
Speakers: Rick Eads (Keysight Technologies), Pegah Alavi (Keysight)
Location: Great America 1
Track: Keysight Education Forum
S-parameters, ISI, Crosstalk, Equalization, and How They Play Together at 50+G
Speaker: Ransom Stephens (Ransom's Notes)
Location: Great America 2
Track: Sponsored Session
Solving PCI Express 5.0 Test Methodologies and Measurement Challenges
Speaker: Dan Froelich (Tektronix)
Location: Room 203
Track: Sponsored Session
Panel – Stump the SI/PI Experts
Moderator: Eric Bogatin (Teledyne LeCroy and Univ of Colorado Boulder)
Speakers: Istvan Novak (Samtec), Steve Sandler (Picotest), Vladimir Dmitriev Zdorov (Mentor Graphics), Larry Smith (Micron)
Location: Chiphead Theater
Track: Chiphead Theater
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
A System-Level Power Integrity Study of Multi-Domain Power Supply Noise Coupling
Speaker: Dmitry Klokotov (Xilinx)
Location: Ballroom G
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speaker: Priyank Shukla (Synopsys)
Authors: Kevin Li (Synopsys), Ayal Shoval (Synopsys), Ismael Duron (Synopsys)
Location: Ballroom B
Track: 02. Chip I/O & Power Modeling & Validation Solutions
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speaker: Jonathan Doyland (Intel)
Location: Ballroom E
Track: 03. Integrating Photonics & Wireless in Electrical Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Machine Learning Applications for COM Based Simulation of 112Gb Systems
Speakers: Alex Manukovsky (Intel), Yuriy Shlepnev (Simberian Inc.), Zurab Khasidashvili (Intel)
Location: Ballroom F
Track: 14. Machine Learning for Microelectronics, Signaling & System Design, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Optimization of Material Characterization & Tolerance Design on Differential Stripline
Speakers: Jing Lin (ZTE), Yi Chen (ZTE)
Authors: Shiju Sui (ZTE), Haidan Yu (ZTE), Zhifen Xie (ZTE)
Location: Ballroom D
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
PCB Material Characterization with One Measurement!
Speakers: Jason Ellison (Amphenol), Michael Rowlands (Amphenol)
Location: Ballroom C
Track: 12. Applying Test & Measurement Methodology, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: Ali Khoshniat (Santa Clara University), Ramesh Abhari (Santa Clara University)
Location: Ballroom A
Track: 11. Electromagnetic Compatibility/Mitigating Interference
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Closing the Gap: Memory Solutions for AI/ML
Speaker: Frank Ferro (Rambus)
Location: Great America 3
Track: Sponsored Session
Rapid Characterization of High Speed Digital Channels using a Multiport VNA
Speaker: Ryan Letcher
Location: Great America 2
Track: Sponsored Session
The Building Blocks of Automated Vehicles
Speaker: Sara Sargent (VSI Labs)
Location: Chiphead Theater
Track: Chiphead Theater
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Location: Mission City Ballroom
Track: Conference Networking Lunch
Format: Networking
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Product Showcase: BSX320 Tektronix BSX Series Bit Error Rate Tester
Location: Booth 519
Track: Product Showcase
Applied TDR for Signal Integrity Applications
Speaker: Randy White (Rohde & Schwarz USA, Inc)
Location: Great America 2
Track: Sponsored Session
Speakers: Chris Cheng (HP Enterprise), Yongjin Choi (HP Enterprise), Yasin Damgaci (HP Enterprise), Matt Reagor (Rigetti Computing)
Location: Ballroom G
Track: 14. Machine Learning for Microelectronics, Signaling & System Design, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Designing Next Generation Memory Interfaces: Modeling, Analysis & Tips
Speakers: Daniel Lambalot (Socionext), Justin Butterfield (Micron), Zhen Mu (Cadence Design Systems)
Author: Dong Soon Lim (Micron)
Location: Ballroom A
Track: 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
End-to-End FEC Performance Analysis for Multi-Part PAM4 Systems
Speakers: Amanda (Xiaoqing) Dong (Xilinx), Nick (Chunxing) Huang (Shenzhen Zhongzeling Electronics), Geoff (Geoffrey) Zhang (Xilinx)
Location: Ballroom C
Track: 09. High-Speed Signal Processing, Equalization & Coding, 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Finding Reflective Insertion Loss Noise & Reflectionless Insertion Loss
Speakers: Hansel Dsilva (Achronix Semiconductor Corporation), Richard Mellitz (Samtec), Adam Gregory (Samtec)
Authors: Sasikala J (Achronix Semiconductor Corporation), Abhishek Jain (Achronix Semiconductor Corporation), Amit Kumar (Achronix Semiconductor Corporation), Beomtaek Lee (Intel)
Location: Ballroom D
Track: 07. Optimizing High-Speed Serial Design, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speaker: Subin Kim (Korea Advanced Institute of Science and Technology)
Authors: Kyungjun Cho (Korea Advanced Institute of Science and Technology), Shinyoung Park (Korea Advanced Institute of Science and Technology), Hyunwook Park (Korea Advanced Institute of Science and Technology (KAIST)), Gapyeol Park (Korea Advanced Institute of Science and Technology), Seungtaek Jeong (Korea Advanced Institute of Science and Technology), Joungho Kim (Korea Advanced Institute of Science and Technology)
Location: Ballroom F
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Interface Solutions for Enterprise and Hyperscale Data Centers
Location: Great America 3
Track: Sponsored Session
Modular Platform Design & Optimization for PCIe 5.0 IPs Validation
Speakers: Xiao-Ming Gao (Intel Corporation), Peng Z Yang (Intel Corporation), Jianmei X Zhu (Intel Corporation), Guoyu (Stan) Yang (Intel Corporation)
Location: Ballroom B
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Noise Modeling & Simulations in 112-Gbps PAM4 Serial Links
Speakers: Hsinho Wu (Intel Corp), Mike Li (Intel Corp), Masashi Schimanouchi (Intel Corp)
Location: Ballroom E
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Product Showcase: ANSYS HFSS 3D Layout
Location: Booth 745
Leading Edge + Mainstream Technologies: Everything is Moving to Next Generation
Speaker: Brig Asay (Keysight Technologies)
Location: Chiphead Theater
Track: Chiphead Theater
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
A parametric approach to jitter measurement
Speaker: Mike Schnecker (Rohde & Schwarz USA, Inc)
Location: Great America 2
Track: Sponsored Session
AI Interposer Power Modeling & HBM Power Noise Prediction Studies
Speakers: Jinsong Hu (Cadence), Yongsong He (Enflame Tech)
Location: Ballroom A
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Current Distribution, Resistance & Inductance in Power Connectors
Speakers: Adam Gregory (Samtec), Istvan Novak (Samtec), Clement Luk (Samtec)
Author: Gustavo Blando (Samtec)
Location: Ballroom G
Track: 10. Power Integrity in Power Distribution Networks, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
DFE Tap Based Optimizing Algorithm for Dynamic CTLE Parameter Adjustment
Speakers: Jun Wang (Ericsson AB), Nicke Svee (Ericsson AB)
Location: Ballroom F
Track: 09. High-Speed Signal Processing, Equalization & Coding, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Evolution of PCIe: Hardware Components & How They Impact Past, Present & Future Standards
Speakers: Davi Correia (Carlisle IT), Raul Stavoli (Carlisle IT), Kelsey Fisher (Carlisle IT)
Author: Emad Soubh (Carlisle IT)
Location: Ballroom D
Track: 13. Modeling & Analysis of Interconnects, 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Measuring Oscilloscope Voltage Probe Performance
Speaker: Steve Sandler (Picotest)
Location: Ballroom C
Track: 12. Applying Test & Measurement Methodology, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
PDN Induced Jitter Analysis in High Speed NAND Flash Memory Interface
Speaker: Sayed Mobin (Western Digital)
Authors: Venkatesh Ramachandra (Western Digital), Pranav Balachander (Western Digital), Jiwang Lee, Chau D. Nguyen (Western Digital), Asha Sharma (Western Digital)
Location: Ballroom B
Track: 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Signal Integrity Optimizations in a 400-Gbps Silicon Photonics Package
Speaker: Jianqiang Li (Alibaba Group)
Authors: Anbin Wang (Alibaba Group), Chongjin Xie (Alibaba Group (U.S.) Inc.)
Location: Ballroom E
Track: 03. Integrating Photonics & Wireless in Electrical Design, 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Thermal Issues and Solutions for 3D ICs: Latest Updates and Future Prospect
Speaker: Sung-Kyu Lim
Location: Room 203
Track: Sponsored Session
Where the Rubber Meets the Road: Satisfying the Emerging Requirements For Automotive Interfaces
Speaker: Frank Ferro (Rambus)
Location: Great America 3
Track: Sponsored Session
Lightning Talk – Device-Less Temperature Sensing
Speakers: Pete Uka (Q-flex Inc.), CHIRANJEEV PATIL (Q-flex Inc.), Nishal Uka (Q-flex Inc.)
Location: Chiphead Theater
Track: Chiphead Theater, 04. Advances in Materials & Processing for PCBs, Modules & Packages
Format: Lightning Talk
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Lightning Talk – Testing Power Supply Noise Rejection in Differential Oscillators
Speakers: Michael Arkin (Epson America, Inc.), Neil Jarvis (Rohde & Schwarz)
Location: Chiphead Theater
Track: Chiphead Theater, 12. Applying Test & Measurement Methodology
Format: Lightning Talk
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Make More Accurate Power Integrity Measurements
Speaker: Joel Woodward (Rohde & Schwarz USA, Inc.)
Location: Great America 2
Track: Sponsored Session
Panel – Enabling New Architectures: An Update on OIF's CEI-112G Electrical Interfaces
Moderator: Nathan Tracy (TE Connectivity)
Panelists: Cathy Liu (Broadcom Inc.), Steve Sekel (Keysight Technologies), Ed Frlan (Semtech), Gary Nicholl (Cisco), Mike Li (Intel)
Location: Ballroom F
Track: 07. Optimizing High-Speed Serial Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Panel – Next-Generation Materials for High-Speed Digital Design
Moderator: Bill Hargin (Z-zero)
Panelists: Don DeGroot (CCN Labs), Allen Horn (Rogers Corporation), Scott McMorrow (Samtec's Signal Integrity Group, Inc.), Edward Kelley (Isola Group), Antonio Senese (Panasonic)
Location: Ballroom G
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages, 07. Optimizing High-Speed Serial Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Panel – Succeeding with Next-Generation AMI Models & Analysis
Moderator: Donald Telian (SiGuys)
Panelists: Ken Willis (Cadence), Stephen Scearce (Cisco), Walter Katz (MathWorks), Hsinho Wu (Intel), Justin Butterfield (Micron)
Location: Ballroom D
Track: 02. Chip I/O & Power Modeling & Validation Solutions, 07. Optimizing High-Speed Serial Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Solving Power Integrity Test Challenges
Speaker: Steve Sandler
Location: Room 203
Track: Sponsored Session
Product Showcase: JAE Presents DZ20 Series High Performance FFC Cable Dual Row Connectors
Location: Booth 303
Track: Product Showcase
So You Think You Understand What a TDR Measures
Speaker: Eric Bogatin (Teledyne LeCroy Signal Integrity Academy)
Location: Chiphead Theater
Track: Chiphead Theater, 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Location: Expo Hall
Track: Booth Bar Crawl
Format: Networking
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
DesignCon 25th Anniversary Celebration
Location: Chiphead Theater
Track: Chiphead Theater
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
A Statistical Modeling Approach for FEC-Encoded High-Speed Wireline Links
Speaker: Ming Yang (University of Toronto)
Location: Ballroom B
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
De-coupled Magnetic & Electric Field Phase Assessment in the Near-Field Zone
Speaker: Maryna Nesterova (Aprel)
Location: Ballroom A
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Design Considerations of an Optical Transceiver
Speakers: Sanjeev Gupta (Intel), Sunil Priyadarshi (Intel), Jiajun Wang (Intel)
Location: Ballroom F
Track: 03. Integrating Photonics & Wireless in Electrical Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Equivalent-Time Sampling Oscilloscope Aliasing Analysis
Speakers: Kan Tan (Tektronix), John Pickerd (Tektronix), Pavel Zivny (Tektronix), Maria Agoston (Tektronix)
Location: Ballroom G
Track: 12. Applying Test & Measurement Methodology, 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
LPDDR4 Eye-Mask Violation Induced by SSN: Problem/Solution for Neural Compute Engine Package Design
Speaker: Benjamin Silva (Intel Corporation)
Authors: Yan Fen Shen (Intel Corporation), Mohamed Eldessouki (Intel Corporation)
Location: Ballroom C
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
The Impact of Return Loss on Chord Signaling
Speaker: Sherman Chen (Kandou Bus)
Location: Ballroom E
Track: 07. Optimizing High-Speed Serial Design, 09. High-Speed Signal Processing, Equalization & Coding
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speaker: CHRISTOPHER DIMINICO (PHY-SI LLC)
Authors: Richard Mellitz (Samtec), OJ Danzy (Keysight Technologies), Michael Resso (Keysight Technologies), Mike Sapozhnikov (Cisco Systems), Michael Klempa (UNH-IOL)
Location: Ballroom D
Track: 13. Modeling & Analysis of Interconnects, 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
More than Moore from an IC Package Designer’s Viewpoint
Speaker: John Park (Cadence)
Location: Mission City M1
Track: Sponsored Session
S-Parameter Master Class Part 1 with Eric Bogatin - Hands on Lab
Speaker: Eric Bogatin (Teledyne LeCroy)
Location: Mission City M3
Track: Sponsored Session
Data Center and Optical Network Innovation: Enabling the 5G Ecosystem
Speaker: Beate Hoehne (Keysight Technologies)
Location: Great America 1
Track: Keysight Education Forum
Speakers: Xiaoping Liu (Intel Corporation), Wendem Beyene (Intel Corporation)
Location: Ballroom B
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Alternate/Unique Filtering Techniques for Sensitive Power Supply Isolation & Consolidation
Speakers: Yan Fen Shen (Intel Corporation), Ben Silva (Intel Corporation)
Location: Ballroom E
Track: 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: Eduardo Moctezuma-Pascual (INAOE), Dr. Svetlana C. Sejas-Garcia (SV probe), Reydezel Torres-Torres (INAOE)
Author: Doug Trobough (Isola-Group)
Location: Ballroom A
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Component Design Specification Study for Electrical Serial Links Beyond 112G
Speaker: Bi Yi (ZTE)
Authors: Fang Nan (ZTE), Jian Pang (ZTE)
Location: Ballroom G
Track: 07. Optimizing High-Speed Serial Design, 09. High-Speed Signal Processing, Equalization & Coding
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Millimeter-Wave Surface Mount Antennas for High-Speed Plastic Fiber Data Transport
Speakers: Dr. Joy Laskar (Maja Systems), Dr. John Sevic (Maja Systems)
Location: Ballroom F
Track: 03. Integrating Photonics & Wireless in Electrical Design, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Power Coupling Extraction Method Comparison
Speaker: Sherman S. Chen (Kandou Bus)
Author: John Phillips (Cadence Design Systems)
Location: Ballroom C
Track: 02. Chip I/O & Power Modeling & Validation Solutions, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speaker: Youngwoo Kim (NAIST)
Location: Ballroom D
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Accelerating Your System Designs with Latest Multi-Physics Simulation Technologies
Speaker: Ben Gu (Cadence)
Location: Mission City M1
Track: Sponsored Session
Best Practices for Modeling SerDes Systems and Improving IBIS-AMI Correlation
Speaker: Giorgia Zucchelli (MathWorks)
Location: Room 203
Track: Sponsored Session
Challenges and solutions for characterizing opto-electronic components in the high-speed data world
Speaker: Navneet Kataria
Location: Great America 2
Track: Sponsored Session
S-Parameter Master Class Part 2 with Eric Bogatin - Hands on Lab
Speaker: Eric Bogatin (Teledyne LeCroy)
Location: Mission City M3
Track: Sponsored Session
Updates on the Challenges of Characterizing 112 Gbps/Lane Designs
Speakers: Rob Sleigh (Keysight Technologies), John Calvin (Keysight Technologies)
Location: Great America 1
Track: Keysight Education Forum
Keynote – Microchips in Space: How Device Design Enables Amazing Astronomy
Keynote: Zaheer Ali (NASA’s Stratospheric Observatory for Infrared Astronomy (SOFIA))
Location: Elizabeth A. Hangs Theater
Track: Keynote
Format: Keynote
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Practical Bit Error Rate and RS(544,514) FEC Testing and Troubleshooting for PAM4 Links
Speakers: Steve Sekel (Keysight Technologies), Charles Seifert (Keysight Technologies)
Location: Great America 1
Track: Keysight Education Forum
An Optimized Method Based on Markov Chain to Calculate Total BER Pre-FEC
Speakers: Xiaowei Zhan (ZTE), Qin Li (ZTE)
Authors: Shiju Sui (ZTE), Yi Chen (ZTE), Haidan Yu (ZTE)
Location: Ballroom D
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 09. High-Speed Signal Processing, Equalization & Coding
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
DARPA Organic Interposer Characterization
Speaker: Dylan Williams (NIST)
Authors: Jerome Cheron (NIST), Richard Chamberlin (NIST), Brent Devetter (Boeing), Sam Chitwood (Cadence Design Systems), Ken Willis (Cadence), Brad Butler (Cadence Design Systems), Farhang Yazdani (Broadpak Corp.)
Location: Ballroom G
Track: 13. Modeling & Analysis of Interconnects, 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
EDA Flows & Modeling Approaches to Study Analog/Digital Coupling in Semiconductor Products
Speakers: Karthik Chandrasekar (Seagate), Emmanuel Atta (Seagate), Pritesh Pawaskar (Seagate Technology)
Authors: Ratnakar Dadi (Seagate Technology), Gurdev Dhanota (Seagate Technology)
Location: Ballroom F
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Evolution of Transceiver On-Die Termination Models for IBIS-AMI & COM
Speaker: Masashi Shimanouchi (Intel)
Authors: Hsinho Wu (Intel), Mike Peng Li (Intel)
Location: Ballroom C
Track: 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Impact of Clock Recovery Design on PAM4 Measurements
Speakers: Pavel Zivny (Tektronix), Jesse Hawkins (Tektronix)
Location: Ballroom B
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Signal & Power Integrity Co-Simulation for High-Density Heterogenous Multi-Die Design
Speaker: Ashkan Hashemi (Intel Corporation)
Authors: Guang Chen (Intel Corporation), Hyosoon Kang (Intel Corporation), Wendem Beyene (Intel Corporation)
Location: Ballroom A
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Verilog-A Model for PMIC & Dynamic Scaled Current Source & Its Effect on System PDN Performance
Speaker: Jungil Son (Samsung Foundary)
Location: Ballroom E
Track: 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
PCIe® G4/G5 TX/RX Compliance Test
Speaker: Patrick Connally
Location: Great America 2
Track: Sponsored Session
Prepare for DDR5 Test Challenges as We Migrate to Next Gen Memory
Speaker: Saifee Jadanswala (Tektronix)
Location: Room 203
Track: Sponsored Session
Signal Channel Design and Simulation for Silicon Interposer Packaging on High-Speed SerDes
Speaker: Danny Ho (Media Tek)
Location: Mission City M1
Track: Sponsored Session
USB4™ Physical and Protocol Layer Testing
Speaker: Mike Engbretson (Teledyne LeCroy)
Location: Mission City M3
Track: Sponsored Session
What You Need to Know Before Simulating DDR5 Memory Designs
Speaker: Hee-Soo Lee (Keysight Technologies)
Location: Great America 1
Track: Keysight Education Forum
Differential Pairs Don't Need a Return Path, or Do They?
Speaker: Eric Bogatin (Teledyne LeCroy Signal Integrity Academy)
Location: Chiphead Theater
Track: Chiphead Theater, 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
A Method for Dynamic Load Current Testing with a Benchtop Power Supply
Speakers: Heidi Barnes (Keysight Technologies), Jack Carrel (Xilinx), Steve Sandler (Picotest)
Location: Ballroom B
Track: 12. Applying Test & Measurement Methodology, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Accelerate Interposer Design Efficiency Using Neural Networks & Genetic Algorithms
Speakers: Xiao-Ming Gao (Intel Corporation), Naveid Rahmatullah (Intel), Taylor Hogan (Cadence), Jorge Gonzalez (Cadence Design Systems)
Location: Ballroom D
Track: 14. Machine Learning for Microelectronics, Signaling & System Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Analysis on Power Via Induced Quasi-Quarter-Wavelength Resonance for Crosstalk Reduction
Speakers: DongHyun (Bill) Kim (Missouri University of Science and Technology), Siqi Bai (Missouri University of Science and Technology), Junda Wang (Missouri University of Science and Technology), Junyong Park (Korea Advanced Institute of Science and Technology), Jongjoo Lee (Missouri University of Science and Technology), Bichen Chen (Facebook, Inc.), Srinivas Venkataraman (Facebook, Inc.), Xu Wang (Facebook, Inc.), Siqi Bai (Missouri University of Science and Technology)
Location: Ballroom E
Track: 13. Modeling & Analysis of Interconnects, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Impedance Mask-Based PDN Specifications for Memory Modules & PCBs
Speaker: Larry D Smith (Micron)
Location: Ballroom G
Track: 10. Power Integrity in Power Distribution Networks, 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Jitter Behavior & Characterization of On-Die High Speed Clock Signal for Digital Synchronous Design
Speakers: Anna Wong (Xilinx Inc), Gordon Tsui (Xilinx Inc.), Haixin Ke (Xilinx)
Authors: Ajay Kumar Sharma (Xilinx), Yongzhen Chen, Alisa Scherer
Location: Ballroom C
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Maximizing DDR5 Eye-Opening by Identifying Buffer Settings Using Optimization Algorithms
Speakers: Nitin Bhagwath (Mentor Graphics), Daniel De Araujo (Mentor Graphics), Jayaprakash Balachandran (Cisco), Baekkyu Choi (Micron)
Location: Ballroom F
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Location: Outside Room M2
Track: Career Zone
Format: Career Zone Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Signal Integrity Characterization of Via Stubs on High Speed DDR4 Channels
Speaker: Benjamin Dannan (Diversey Inc.)
Location: Ballroom A
Track: 07. Optimizing High-Speed Serial Design, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
IBIS-AMI Back-Channel System Optimization in Practice
Speakers: Steven Parker (Cadence), Jared James (Cadence Design Systems)
Location: Mission City M1
Track: Sponsored Session
Radiated Emissions Troubleshooting & Pre-Compliance Testing
Speakers: Ken Wyatt (Wyatt Technical Services LLC), Dylan Stinson (Tektronix)
Location: Chiphead Theater
Track: Chiphead Theater, 11. Electromagnetic Compatibility/Mitigating Interference
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Location: Mission City Ballroom
Track: Conference Networking Lunch
Format: Networking
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Panel – What's Next? How to Jumpstart Your Career
Moderator: Suzanne Deffree (Informa Markets (formerly UBM))
Panelists: Steve Sandler (Picotest), Charles Lord (Blue Ridge Advanced Design and Automation), George Chao (Manex Consulting), Eric Bogatin (Teledyne LeCroy and Univ of Colorado Boulder), Ryan Cousins (krtkl inc.)
Location: Career Zone - Room M2
Track: Career Zone
Format: Career Zone Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Product Showcase: TPR1000 & TPR4000 Active Power Rail Probes
Location: Booth 519
Track: Product Showcase
A Novel Design Methodology That Solves Todays System-Level Analysis Challenges
Speaker: RItabrata Bhattacharya (Cadence Design Systems)
Authors: Jim Godwin (Texas Instruments), Chanakya K V (Texas Instruments), Taranjit Kukal (Cadence Design Systems)
Location: Ballroom E
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
De-Risking High-Speed RF Designs from Electromagnetic Crosstalk Issues
Speaker: Anand Raman (Ansys)
Location: Room 203
Track: Sponsored Session
Speaker: Jun So Pak (Foundry Samsung Foundry)
Location: Ballroom F
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Minimally Specification Compliant Behavioral Modeling Methodology & Its Applications in HSIO
Speakers: Xinjun Zhang (Intel Corp), Mo Liu (Intel Corp), Kai Xiao (Intel Corp), Zhichao Zhang (Intel Corp), Wenzhi Wang (Intel Corp.), Yang Wu (Intel Corp.)
Location: Ballroom C
Track: 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Optimized Wireless System Design with Minimal RFI Using Antenna Near Field Approach
Speaker: Deepak Pai Hosadurga (Amazon Lab126)
Authors: Jagan Rajagoplan (Amazon Lab126), Akshay Mohan (Amazon Lab126), Qiaolei Huang (Amazon Lab126)
Location: Ballroom A
Track: 11. Electromagnetic Compatibility/Mitigating Interference
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: Hiroshi Goto (Anritsu), Darren Gray (Granite River Labs)
Location: Great America 2
Track: Sponsored Session
Moderator: Suzanne Deffree (Informa Markets (formerly UBM))
Panelists: Agnes Toan (Pixelworks), Naomi Price (Informa Markets (formerly UBM)), Janine Love (Signal Integrity Journal), Jonathan Long (CommScope)
Location: Career Zone - Room M2
Track: Career Zone
Format: Career Zone Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Performance Comparison Between QSFP-DD & OSFP for 56G-PAM4 Applications
Speakers: Xu Jiang (Luxshare-Ict), Kelvin Qiu (Cisco), Andy Nowak (Luxshare-Ict), Geoff (Xilinx)
Authors: Hong Ahn (Xilinx), Melvin Li (Luxshare-Ict)
Location: Ballroom B
Track: 07. Optimizing High-Speed Serial Design, 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Power Coupling Extraction Method Comparison
Speaker: Sherman Chen (Kandou Bus)
Location: Mission City M1
Track: Sponsored Session
Speakers: Igal Fridman (Major Technology Company), Robert Carter (Oak-Mitsui Technologies), Amiram Jibly (Intel)
Authors: Alex Manukovsky (Intel), Shimon Mordooch (Harmonic Video Networks)
Location: Ballroom G
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Real-Time Jitter Analysis Using Hardware Based Clock Recovery & Serial Pattern Trigger
Speaker: Michael Schnecker (Rohde & Schwarz)
Location: Ballroom D
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
SI/PI on a Budget: Five Tricks to Get More out of your Oscilloscope
Speaker: Eric Bogatin (Teledyne LeCroy)
Location: Mission City M3
Track: Sponsored Session
Panel – How Device Design can Drive Progress in Industry 4.0
Moderator: John Blyler (Informa Markets)
Panelists: Zaheer Ali (NASA’s Stratospheric Observatory for Infrared Astronomy (SOFIA)), George Szabo (AIXIA Global), Chris Cheng (HP Enterprise)
Location: Chiphead Theater
Track: Chiphead Theater
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
400G BER and Jitter Tolerance Test for 53Gbaud PAM4 with FEC
Speaker: Hiroshi Goto (Anritsu)
Location: Great America 2
Track: Sponsored Session
Speaker: Mohiuddin Mazumder (Intel Corporation)
Location: Ballroom C
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
COM & Reference Transmitter/Receiver/Package for 106/112-Gbps Long-Reach & Chip-to-Chip Links
Speakers: Hsinho Wu (Intel Corp), Mike Li (Intel Corp), Masashi Shimanouchi (Intel Corp)
Location: Ballroom D
Track: 09. High-Speed Signal Processing, Equalization & Coding, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: Anna Gao (Cisco Systems, Inc.), Feng Ling (Xpeedic Technology, Inc.)
Authors: Kevin Cai (Cisco Systems, Inc.), Bidyut Sen (Cisco Systems, Inc.), Joshua Wan (Xpeedic Technology, Inc.)
Location: Ballroom E
Track: 13. Modeling & Analysis of Interconnects, 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Holistic System-Level Design and Analysis of Chips, Packages, and Boards
Speaker: John Park (Cadence)
Location: Mission City M1
Track: Sponsored Session
Jitter Measurements with Decision Feedback Equalization
Speaker: Kalev Sepp (Sepson Analytics LLC)
Author: John Calvin (Keysight Technologies)
Location: Ballroom F
Track: 12. Applying Test & Measurement Methodology, 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Real Time On-Die Power & Thermal Profiling for Machine Learning Design Applications
Speakers: Thomas To (Xilinix), Ajay Kumar Sharma (Xilinx), Nitin Srivastava (Xilinx)
Authors: Changyi Su (Xilinx), Ed Priest (Xilinx), Juan Wang (Xilinx)
Location: Ballroom B
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Reliability Challenges in Advanced Packaging
Speaker: Craig Hillman
Location: Room 203
Track: Sponsored Session
Self-Evolution Cascade Deep Learning for SerDes Adaptive Equalization
Speakers: Bowen Li (North Carolina State University), Brandon Jiao (Xilinx, Inc.), Chih-Hsun Chou (Xilinx)
Authors: Romi Mayder (Xilinx, Inc.), Paul Franzon (North Carolina State University), Geoff (Geoffrey) Zhang (Xilinx, Inc.)
Location: Ballroom G
Track: 14. Machine Learning for Microelectronics, Signaling & System Design, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Solving PCI Express Issues Spanning Physical and Protocol Layers
Speaker: Patrick Connally
Location: Mission City M3
Track: Sponsored Session
Study of Advanced DSP & FEC Algorithms for 112G PAM4 Links
Speakers: Yuchun Lu (Huawei Technologies), Zhilei Huang (Huawei Technologies)
Location: Ballroom A
Track: 07. Optimizing High-Speed Serial Design, 09. High-Speed Signal Processing, Equalization & Coding
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speaker: Lisa Fetterman (Nomiku)
Location: Career Zone - Room M2
Track: Career Zone
Format: Career Zone Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Panel – Untangling Standards: The Challenges Inside the Box
Moderator: Jay Diepenbrock (SIRF Consultants, LLC)
Panelists: Cristian Filip (Mentor Graphics), Ken Schmahl (Achronix Semiconductor), Stephanie Rubalcava (Keysight Technologies)
Location: Chiphead Theater
Track: Chiphead Theater
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
100Gbps BER Test and FEC Error Analysis
Speaker: James Morgante (Anritsu)
Location: Great America 2
Track: Sponsored Session
Building Better 2.5D/3DIC Packages
Speaker: Jun So Pak (Foundry Samsung Foundry)
Location: Mission City M1
Track: Sponsored Session
PCI Express Electrical Test – from 8 Gb/s to 32 Gb/s and beyond
Speaker: Patrick Connally
Location: Mission City M3
Track: Sponsored Session
Panel – Electronic Design Automation Roadmap for Machine Learning & AI Standardization
Moderator: John Ellis (Silicon Integration Initiative, Inc.)
Panelists: Leigh Anne Clevenger (Silicon Integration Initiative, Inc.), Rhett Davis (North Carolina State University), Leon Stok (IBM), Norman Chang (ANSYS), Ramond Rodríguez (Intel)
Location: Ballroom D
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Panel – PCIe 32G & 64G: System Design & Test Challenges
Moderator: Pegah Alavi (Keysight)
Panelists: Steve Krooswyk (Samtec), Rita Horner (Synopsys), Ying Li (NVIDIA), Dan Froelich (Tektronix), Patrick Casher (Foxconn Interconnect Technology), David Bouse (Tektronix), Rick Eads (Keysight), Tim Wig (Intel)
Location: Ballroom F
Track: 07. Optimizing High-Speed Serial Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Panel – What is Needed for the Next Speed Node Past 112 Gbps & up to 224 Gbps?
Moderator: Cathy Liu (Broadcom Inc.)
Panelists: Jane Lim (Cisco Systems), Rob Stone (Broadcom Inc.), Richard Ward (Intel), Pervez Aziz (Nvidia), Lars Thon (LT Engineering)
Location: Ballroom G
Track: 09. High-Speed Signal Processing, Equalization & Coding, 07. Optimizing High-Speed Serial Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Complimentary Professional Headshots
Location: Networking Zone, Booth 807
Track: Career Zone
Format: Career Zone Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Moderator: Suzanne Deffree (Informa Markets (formerly UBM))
Panelists: Pamela Leggett-Robinson (PLR Consulting), Sara Sargent (VSI Labs), Roshni Uppala (Uber)
Location: Career Zone - Room M2
Track: Career Zone
Format: Career Zone Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Panel – How to Become an Industry Influencer
Moderator: Ken Schmahl (Achronix Semiconductor)
Panelists: Istvan Novak (Samtec), Antonio Ciccomancini-Scogna (Western Digital), Adam Gregory (Samtec), Hansel Dsilva (Achronix Semiconductor Corporation), Bert Simonovich (Lamsim Enterprises Inc.)
Location: Chiphead Theater
Track: Chiphead Theater
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Location: Expo Hall
Track: Booth Bar Crawl
Format: Networking
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass