Welcome to the DesignCon 2020 agenda and presentation download site. Here you can view and download conference and/or Chiphead Theater presentations before, during, and after the event. If you’re looking for a presentation from a specific session that you’re unable to find here, it is likely because the presenter has not provided permission for external use or has not yet shared their presentation with us. Please check back after the event for a more complete catalogue of available presentations.
Location: Mission City Ballroom Foyer
Track: Welcome Breakfast
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass
Boot Camp – Optical High-Speed Serial Data Measurements for Electrical Engineers
Speaker: Pavel Zivny (Tektronix)
Location: Great America 2
Track: 03. Integrating Photonics & Wireless in Electrical Design
Format: Boot Camp
Pass Type: All-Access Pass, Alumni All-Access Pass, Boot Camp Pass
Boot Camp – Relating SI & PI for High-Speed Digital Boards: FPGA DDR4 Case Study
Speakers: Jack Carrel (Xilinx), Steve Sandler (Picotest), Heidi Barnes (Keysight)
Location: Ballroom G
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Boot Camp
Pass Type: All-Access Pass, Alumni All-Access Pass, Boot Camp Pass
Boot Camp – Under the Hood: Understand the Software that Drives Electromagnetic Simulation Tools
Speakers: Davi Correia (Carlisle IT), Raul Stavoli (Carlisle IT)
Location: Ballroom F
Track: 13. Modeling & Analysis of Interconnects
Format: Boot Camp
Pass Type: All-Access Pass, Alumni All-Access Pass, Boot Camp Pass
Speaker: Mike Li (Intel)
Location: Ballroom C
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Tutorial – Open-Source Software Tools for Signal Integrity
Speaker: Peter Pupalaikis (Teledyne LeCroy)
Location: Ballroom D
Track: 13. Modeling & Analysis of Interconnects
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Tutorial – Radiated Emissions: Debugging & Pre-Compliance Testing
Speakers: Ken Wyatt (Wyatt Technical Services LLC), Dylan Stinson (Tektronix)
Location: Ballroom B
Track: 11. Electromagnetic Compatibility/Mitigating Interference
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Tutorial – The Absolute Beginner's Guide to RF & Microwave PCB Design
Speaker: Ben Jordan (Altium LLC)
Location: Ballroom A
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Keynote – The Future of Fiber Optic Communications: Datacenter and Mobile
Keynote: Chris Cole (II-VI)
Location: Elizabeth A. Hangs Theater
Track: Keynote
Format: Keynote
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Location: Mission City Ballroom
Track: Networking Lunch
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass
Speakers: Yuriy Shlepnev (Simberian Inc.), Vadim Heyfitch (Xilinx)
Location: Ballroom C
Track: 13. Modeling & Analysis of Interconnects
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Tutorial – Electronic/Photonic IC Design for 5G RF Applications
Speakers: James Pond (Lumerical), Gilles Lamant (Cadence), Pei-Der Tseng (Cadence Design Systems), Samir Chaudhry (TowerJazz)
Location: Ballroom A
Track: 03. Integrating Photonics & Wireless in Electrical Design
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Speakers: Xiaoning Ye (Intel Corp), Jay Diepenbrock (SIRF Consultants, LLC), Heidi Barnes (Keysight), Eric Bogatin (Teledyne LeCroy), Mikheil Tsiklauri (Missouri University of Science and Technology), Jason Ellison (Amphenol), Se-Jung Moon (Intel), Jose Moreira (Advantest), Ching-Chao Huang (AtaiTec Corporation)
Location: Ballroom B
Track: 12. Applying Test & Measurement Methodology
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Tutorial – Signal Integrity: Measurements & Instrumentation
Speakers: Michael Schnecker (Rohde & Schwarz), Jeff Cuyle (Rohde & Schwartz), Rick Daniel (Rohde & Schwarz), Neil Jarvis (Rohde & Schwarz)
Location: Ballroom D
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 12. Applying Test & Measurement Methodology
Format: Tutorial
Pass Type: All-Access Pass, Alumni All-Access Pass
Panel – 800G & Beyond: Optical Transceiver Technology
Speaker: Sunil Priyadarshi (Intel)
Location: Ballroom D
Track: 03. Integrating Photonics & Wireless in Electrical Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Panel – The Case of the Closing Eyes: PAM is the Answer, or Not?
Moderator: Ransom Stephens (Ransom's Notes)
Panelists: Cathy Liu (Broadcom), Chris Loberg (Tektronix, Inc.), Mark Marlett (Inphi Corp), Mike Li (Intel), Pavel Zivny (Tektronix), Greg LeCheminant (Keysight Technologies)
Location: Ballroom F
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Panel – The Cat's Out of the Box: Quantum Computing & Electronic Design
Moderator: Chris Cheng (HP Enterprise)
Panelists: Paul Franzon (North Carolina State University), Daniel Stancil (North Carolina State University), Greg Byrd (North Carolina State University)
Location: Ballroom G
Track: 14. Machine Learning for Microelectronics, Signaling & System Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Advanced Interconnect Process Enables Very High Density PCB Structures
Speaker: Mike Vinson (Averatek)
Location: Ballroom E
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
IBIS-AMI Back-Channel System Optimization in Practice
Speaker: Steven Parker (Avera Semi (subsidiary of GLOBALFOUNDRIES))
Location: Ballroom B
Track: 07. Optimizing High-Speed Serial Design, 09. High-Speed Signal Processing, Equalization & Coding
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Industry-Leading High Bandwidth Memory Interface Solutions for Inference/AI
Speaker: Billy Koo (samsung foundry)
Location: Ballroom F
Track: 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
New USB-C Alternate Mode: Design, Optimization & Validation
Speakers: Chia-Yuan Hsieh (NVIDIA), David Chen (NVIDIA), Richie Lu (NVIDIA), Jason Tsai (NVIDIA), Norman Chang (NVIDIA), Sunil Sudhakaran (NVIDIA)
Location: Ballroom C
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Preparing to Test & Avoid Pitfalls in Your USB4 Implementations
Speaker: Jit Lim (Keysight Technologies)
Location: Ballroom G
Track: 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Signal Model-Based Approach to a Joint Jitter & Noise Decomposition
Speakers: Adrian Ispas (Rohde & Schwarz), Julian Leyh (Rohde & Schwarz), Andreas Maier (Rohde & Schwarz), Bernhard Nitsch (Rohde & Schwarz)
Location: Ballroom A
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
The Hidden Challenges in 112-Gb Channel Design & Modeling
Speakers: Alex Manukovsky (Intel), Roee Bloch (Marvell Semiconductor)
Location: Ballroom D
Track: 13. Modeling & Analysis of Interconnects, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
DDR5/LPDDR5 Design, Debug, Probing, and Validation Challenges and Solutions
Speakers: Jennie Grosslight (Keysight Technologies), Stephen Slater (Keysight Technologies), Stephanie Rubalcava
Location: Great America 1
Track: Keysight Education Forum
Speakers: Makoto Nagata (Kobe University), Norman Chang (Ansys), Akihiro Tsukioka (Kobe Uni), Karthik Srinivasan (Ansys)
Location: Ballroom F
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
A Practical Method for 3D-Modeling of Glass Weave
Speaker: Kenji Nonaka (Sony LSI Design Incorpolated)
Location: Ballroom G
Track: 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Achieving a Robust Power Integrity Solution While Integrating Multiple IPs
Speakers: Praveen Pai (Intel), Vishram Pandit (Intel)
Location: Ballroom B
Track: 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
DfA (Design for AMI): A New Integrated Workflow for Modeling 56G PAM4 SerDes Systems
Speakers: Ravindra Rudraraju (Intel), Richard Allred (MathWorks), Barry Katz (MathWorks), Jonggab Kil (Intel), Tripp Worrell (MathWorks), Walter Katz (MathWorks), Vijay Kasturi (Intel)
Location: Ballroom E
Track: 02. Chip I/O & Power Modeling & Validation Solutions, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
End-to-End System-Level Simulations with Retimers for PCIe Gen5 & CXL: A How-To Guide
Speakers: Casey Morrison (Astera Labs, Inc.), Elene Chobanyan (Hewlett Packard Enterprise), Pegah Alavi (Keysight)
Location: Ballroom D
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
PCB Material Characterization with One Measurement!
Speakers: Jason Ellison (Amphenol), Michael Rowlands (Amphenol)
Location: Ballroom C
Track: 12. Applying Test & Measurement Methodology, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: Mike Li (Intel), Hsinho Wu (Intel), Masashi Shimanouchi (Intel)
Location: Ballroom A
Track: 09. High-Speed Signal Processing, Equalization & Coding, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Signal Integrity Simulation and Measurement Correlation: Getting Smart with Beatty Standard
Speakers: Mike Resso (Keysight Technologies), Chun-ting "Tim" Wang Lee (Keysight Technologies)
Location: Great America 1
Track: Keysight Education Forum
Be prepared to test next-gen Type-C technologies – eUSB2, USB 3.2, and USB4
Speaker: Jit Lim (Keysight Technologies)
Location: Great America 1
Track: Keysight Education Forum
Current Distribution, Resistance & Inductance in Power Connectors
Speakers: Adam Gregory (Samtec), Istvan Novak (Samtec), Clement Luk (Samtec), Gustavo Blando (Samtec)
Location: Ballroom G
Track: 10. Power Integrity in Power Distribution Networks, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Design of Tomlinson-Harashima Precoder for 112G-PAM4 XSR Applications
Speakers: Daniel Wu (Xilinx Inc), Valery Kugel (Juniper Networks), Geoffrey Zhang (Xilinx Inc)
Location: Ballroom B
Track: 09. High-Speed Signal Processing, Equalization & Coding, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Leveraging IBIS-AMI Simulations for Optimized Architectural Design in PCIe5 PHY
Speakers: Kevin (Kai) Li (Synopsys), Priyank Shukla (Synopsys), Jianguo Zhou (Synopsys), Christian de Verteuil (Synopsys)
Location: Ballroom D
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
PCI Express 5.0 Solution Extending Study Through PCB Stackup & Geometry Optimization
Speakers: Harrison Fei Xue (Intel), Xinjun Zhang (Intel), Yanwu Wang (Intel)
Location: Ballroom F
Track: 07. Optimizing High-Speed Serial Design, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Prediction of Power Supply Induced Jitter in DDR Interfaces
Speaker: Licheng Wu (NXP Semiconductors)
Location: Ballroom A
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: HYO-SOON KANG (Intel Corporation), Wendem Beyene (Intel Corporation), Ling Yu (Intel Corporation)
Location: Ballroom C
Track: 02. Chip I/O & Power Modeling & Validation Solutions, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
The SI/PI Modeling & Measurement of Memory System by Probing on Top of DRAM Package
Speakers: WonSuk Choi (Samsung Electronics), SangKeun Kwak (Samsung Electronics)
Location: Ballroom E
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
PCI Express Rockets Forward to 64GT/s: Phy Layer Testing Challenges at 32G NRZ and 64G PAM4
Speakers: Rick Eads (Keysight Technologies), Pegah Alavi (Keysight)
Location: Great America 1
Track: Keysight Education Forum
A System-Level Power Integrity Study of Multi-Domain Power Supply Noise Coupling
Speaker: Dmitry Klokotov (Xilinx)
Location: Ballroom G
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: Priyank Shukla (Synopsys), Kevin Li (Synopsys), Ayal Shoval (Synopsys), Ismael Duron (Synopsys)
Location: Ballroom B
Track: 02. Chip I/O & Power Modeling & Validation Solutions
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
End-to-end FEC Performance Analysis for Multi-Part PAM4 Systems
Speakers: Amanda (Xiaoqing) Dong (Xilinx), Nick (Chunxing) Huang (Shenzhen Zhongzeling Electronics), Geoff (Geoffrey) Zhang (Xilinx)
Location: Ballroom C
Track: 09. High-Speed Signal Processing, Equalization & Coding, 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speaker: Jonathan Doyland (Intel)
Location: Ballroom E
Track: 03. Integrating Photonics & Wireless in Electrical Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Machine Learning Applications for COM Based Simulation of 112Gb Systems
Speakers: Alex Manukovsky (Intel), Yuriy Shlepnev (Simberian Inc.), Zurab Khasidashvili (Intel)
Location: Ballroom F
Track: 14. Machine Learning for Microelectronics, Signaling & System Design, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Optimization of Material Characterization & Tolerance Design on Differential Stripline
Speakers: Jing Lin (ZTE), Yi Chen (ZTE)
Authors: Shiju Sui (ZTE), Haidan Yu (ZTE), Zhifen Xie (ZTE)
Location: Ballroom D
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: Ali Khoshniat (Santa Clara University), Ramesh Abhari (Santa Clara University)
Location: Ballroom A
Track: 11. Electromagnetic Compatibility/Mitigating Interference
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Location: Mission City Ballroom
Track: Networking Lunch
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: Chris Cheng (HP Enterprise), Yongjin Choi (HP Enterprise), Yasin Damgaci (HP Enterprise)
Location: Ballroom G
Track: 14. Machine Learning for Microelectronics, Signaling & System Design, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Can Standard or "Custom" Metal Roughness Models be Fixed by Causality Enforcement?
Speaker: Vladimir Dmitriev Zdorov (Mentor Graphics)
Location: Ballroom C
Track: 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Designing Next Generation Memory Interfaces: Modeling, Analysis & Tips
Speakers: Daniel Lambalot (Socionext), Justin Butterfield (Micron), Dong Soon Lim (Micron), Zhen Mu (Cadence Design Systems)
Location: Ballroom A
Track: 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Finding Reflective Insertion Loss Noise and Reflectionless Insertion Loss
Speakers: Hansel Dsilva (Achronix Semiconductor Corporation), Sasikala J (Achronix Semiconductor Corporation), Richard Mellitz (Samtec), Adam Gregory (Samtec)
Authors: Abhishek Jain (Achronix Semiconductor Corporation), Amit Kumar (Achronix Semiconductor Corporation), Beomtaek Lee (Intel)
Location: Ballroom D
Track: 07. Optimizing High-Speed Serial Design, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: Subin Kim (Korea Advanced Institute of Science and Technology), Kyungjun Cho (Korea Advanced Institute of Science and Technology), Shinyoung Park (Korea Advanced Institute of Science and Technology), Hyunwook Park (Korea Advanced Institute of Science and Technology (KAIST)), Gapyeol Park (Korea Advanced Institute of Science and Technology), Seungtaek Jeong (Korea Advanced Institute of Science and Technology), Joungho Kim (Korea Advanced Institute of Science and Technology)
Location: Ballroom F
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Modular Platform Design & Optimization for PCIe 5.0 IPs Validation
Speakers: Xiao-Ming Gao (Intel Corporation), Peng Z Yang (Intel Corporation), Jianmei X Zhu (Intel Corporation), Guoyu (Stan) Yang (Intel Corporation)
Location: Ballroom B
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Noise Modeling & Simulations in 112-Gbps PAM4 Serial Links
Speakers: Hsinho Wu (Intel Corp), Mike Li (Intel Corp), Masashi Schimanouchi (Intel Corp)
Location: Ballroom E
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Leading Edge + Mainstream Technologies – Everything is Moving to Next Generation
Speaker: Brig Asay (Keysight Technologies)
Location: Chiphead Theater
Track: Chiphead Theater
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
AI Interposer Power Modeling & HBM Power Noise Prediction Studies
Speakers: Jinsong Hu (Cadence), Yongsong He (Enflame Tech)
Location: Ballroom A
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Component Design Specification Study for Electrical Serial Links Beyond 112G
Speakers: Bi Yi (ZTE), Yu Bi (Molex), Jiang Pang (ZTE)
Location: Ballroom G
Track: 07. Optimizing High-Speed Serial Design, 09. High-Speed Signal Processing, Equalization & Coding
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
DFE Tap Based Optimizing Algorithm for Dynamic CTLE Parameter Adjustment
Speakers: Jun Wang (Ericsson AB), Nicke Svee (Ericsson AB)
Location: Ballroom F
Track: 09. High-Speed Signal Processing, Equalization & Coding, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Evolution of PCIe: Hardware Components & How They Impact Past, Present & Future Standards
Speakers: Davi Correia (Carlisle IT), Emad Soubh (Carlisle IT), Raul Stavoli (Carlisle IT), Kelsey Fisher (Carlisle IT)
Location: Ballroom D
Track: 13. Modeling & Analysis of Interconnects, 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speaker: Youngwoo Kim (NAIST)
Location: Ballroom E
Track: 11. Electromagnetic Compatibility/Mitigating Interference, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Measuring Oscilloscope Voltage Probe Performance
Speaker: Steve Sandler (Picotest)
Location: Ballroom C
Track: 12. Applying Test & Measurement Methodology, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
PDN Induced Jitter Analysis in High Speed NAND Flash Memory Interface
Speaker: Sayed Mobin (Western Digital)
Location: Ballroom B
Track: 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: Siow Chek Tan (Xilinx Inc), Sherman S. Chen (Kandou Bus), Sanjeev Gupta (Intel), Sunil Priyadarshi (Intel), Jiajun Wang (Intel), Pete Uka (Q-flex Inc.), Chiranjeev Patil (Q-flex Inc.), Michael Arkin (Epson America, Inc.), Neil Jarvis (Rohde & Schwarz), Pavan Kumar Holla (Qualcomm Technologies Inc), Vivek Gopal (Qualcomm Technologies Inc), Prakash Parikh (Qualcomm Technologies Inc), Chunchun Sui (Alibaba Group (U.S.) Inc.), Anbin Wang (Alibaba Group), Chongjin Xie (Alibaba Group (U.S.) Inc.)
Location: Chiphead Theater
Track: Chiphead Theater
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Panel – Enabling New Architectures: An Update on OIF's CEI-112G Electrical Interfaces
Moderator: Nathan Tracy (TE Connectivity)
Panelists: Cathy Liu (Broadcom Inc.), Steve Sekel (Keysight Technologies), Ed Frlan (Semtech), Gary Nicholl (Cisco), Mike Li (Intel)
Location: Ballroom F
Track: 07. Optimizing High-Speed Serial Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Panel – Next Gen Materials for High-Speed Digital Design
Speakers: Bill Hargin (Z-zero), Don DeGroot (CCN Labs), Allen Horn (Rogers Corporation)
Location: Ballroom G
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages, 07. Optimizing High-Speed Serial Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Panel – Succeeding with Next-Generation AMI Models & Analysis
Speakers: Donald Telian (SiGuys), Ken Willis (Cadence), Stephen Scearce (Cisco), Walter Katz (MathWorks), Hsinho Wu (Intel), Justin Butterfield (Micron)
Location: Ballroom D
Track: 02. Chip I/O & Power Modeling & Validation Solutions, 07. Optimizing High-Speed Serial Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
So You Think You Understand What a TDR Measures
Speaker: Eric Bogatin (Teledyne LeCroy Signal Integrity Academy)
Location: Chiphead Theater
Track: Chiphead Theater, 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
DesignCon 25th Anniversary Celebration
Location: Chiphead Theater
Track: Chiphead Theater
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
A Statistical Modeling Approach for FEC-Encoded High-Speed Wireline Links
Speaker: Ming Yang (University of Toronto)
Location: Ballroom B
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
De-coupled Magnetic & Electric Field Phase Assessment in the Near-Field Zone
Speaker: Maryna Nesterova (Aprel)
Location: Ballroom A
Track: 11. Electromagnetic Compatibility/Mitigating Interference, 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Equivalent-Time Sampling Oscilloscope Aliasing Analysis
Speakers: Kan Tan (Tektronix), John Pickerd (Tektronix), Pavel Zivny (Tektronix), Maria Agoston (Tektronix)
Location: Ballroom G
Track: 12. Applying Test & Measurement Methodology, 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
LPDDR4 Eye-Mask Violation Induced by SSN: Problem/Solution for Neural Compute Engine Package Design
Speakers: Yan Fen Shen (Intel Corporation), Benjamin Silva (Intel Corporation), Mohamed Eldessouki (Intel Corporation)
Location: Ballroom C
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
The Impact of Return Loss on Chord Signaling
Speaker: Sherman Chen (Kandou Bus)
Location: Ballroom E
Track: 07. Optimizing High-Speed Serial Design, 09. High-Speed Signal Processing, Equalization & Coding
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
The Reality About Energy Harvesting
Speaker: Lorandt Foelkel (Wurth Elektronik eiSos GmbH)
Location: Ballroom F
Track: 10. Power Integrity in Power Distribution Networks, 14. Machine Learning for Microelectronics, Signaling & System Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: CHRISTOPHER DIMINICO (PHY-SI LLC), Richard Mellitz (Samtec), OJ Danzy (Keysight Technologies), Michael Resso (Keysight Technologies), Mike Sapozhnikov (Cisco Systems), Michael Klempa (UNH-IOL)
Location: Ballroom D
Track: 13. Modeling & Analysis of Interconnects, 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
5G is here, what does that mean for your high speed digital work?
Speakers: Beate Hoehne (Keysight Technologies), Brig Asay (Keysight Technologies)
Location: Great America 1
Track: Keysight Education Forum
Speakers: Xiaoping Liu (Intel Corporation), Wendem Beyene (Intel Corporation)
Location: Ballroom B
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Alternate/Unique Filtering Techniques for Sensitive Power Supply Isolation & Consolidation
Speakers: Yan Fen Shen (Intel Corporation), Ben Silva (Intel Corporation)
Location: Ballroom E
Track: 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: Eduardo Moctezuma-Pascual (INAOE), Dr. Svetlana C. Sejas-Garcia (SV probe), Doug Trobough (Isola-Group), Reydezel Torres-Torres (INAOE)
Location: Ballroom A
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Crosstalk & Return Loss Budget Trade-Offs Among Different Sections in the SerDes Channel
Speakers: Yaping Zhou (NVIDIA), Ying Li (NVIDIA), Ying Li (NVIDIA)
Location: Ballroom C
Track: 13. Modeling & Analysis of Interconnects, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Millimeter-Wave Surface Mount Antennas for High-Speed Plastic Fiber Data Transport
Speakers: Dr. Joy Laskar (Maja Systems), Dr. John Sevic (Maja Systems)
Location: Ballroom F
Track: 03. Integrating Photonics & Wireless in Electrical Design, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
QPRBS31 Correlated Error Analysis in 56G PAM4 FEC Systems
Speakers: Amanda (Xiaoqing) Dong (Xilinx), Bi Yi (ZTE), Nick (Chunxing) Huang (Shenzhen Zhongzeling Electronics), Geoff (Geoffrey) Zhang (,Xilinx)
Location: Ballroom G
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 09. High-Speed Signal Processing, Equalization & Coding
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speaker: Youngwoo Kim (NAIST)
Location: Ballroom D
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Best Practices for Modeling SerDes Systems and Improving IBIS-AMI Correlation
Speaker: Giorgia Zucchelli (MathWorks)
Location: Room 203
Track: Sponsored Session
Updates on the Challenges of Characterizing 112 Gbps/Lane Designs
Speakers: Rob Sleigh (Keysight Technologies), John Calvin (Keysight Technologies)
Location: Great America 1
Track: Keysight Education Forum
Practical Bit Error Rate and RS(544,514) FEC Testing and Troubleshooting for PAM4 Links
Speakers: Steve Sekel (Keysight Technologies), Charles Seifert (Keysight Technologies)
Location: Great America 1
Track: Keysight Education Forum
An Optimized Method Based on Markov Chain to Calculate Total BER Pre-FEC
Speakers: Shiju Sui (ZTE), Xiaowei Zhan (ZTE), Yi Chen (ZTE), Haidan Yu (ZTE)
Location: Ballroom D
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 09. High-Speed Signal Processing, Equalization & Coding
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
DARPA Organic Interposer Characterization
Speakers: Dylan Williams (NIST), Jerome Cheron (NIST), Richard Chamberlin (NIST)
Location: Ballroom G
Track: 13. Modeling & Analysis of Interconnects, 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
EDA Flows & Modeling Approaches to Study Analog/Digital Coupling in Semiconductor Products
Speakers: Karthik Chandrasekar (Seagate), Emmanuel Atta (Seagate), Pritesh Pawaskar (Seagate Technology)
Authors: Ratnakar Dadi (Seagate Technology), Gurdev Dhanota (Seagate Technology)
Location: Ballroom F
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Evolution of Transceiver On-Die Termination Models for IBIS-AMI & COM
Speakers: Masashi Shimanouchi (Intel), Hsinho Wu (Intel), Mike Peng Li (Intel)
Location: Ballroom C
Track: 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Impact of Clock Recovery Design on PAM4 Measurements
Speakers: Pavel Zivny (Tektronix), Mark Guenther (Tektronix), Jesse Hawkins (Tektronix)
Location: Ballroom B
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Signal & Power Integrity Co-Simulation for High-Density Heterogenous Multi-Die Design
Speakers: Ashkan Hashemi (Intel Corporation), Guang Chen (Intel Corporation), Hyosoon Kang (Intel Corporation), Wendem Beyene (Intel Corporation)
Location: Ballroom A
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Verilog-A Model for PMIC & Dynamic Scaled Current Source & Its Effect on System PDN Performance
Speaker: Jungil Son (Samsung Foundary)
Location: Ballroom E
Track: 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
What You Need to Know Before Simulating DDR5 Memory Designs
Speaker: Hee-Soo Lee (Keysight Technologies)
Location: Great America 1
Track: Keysight Education Forum
Differential Pairs Don't Need a Return Path, or Do They?
Speaker: Eric Bogatin (Teledyne LeCroy Signal Integrity Academy)
Location: Chiphead Theater
Track: Chiphead Theater, 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
A Method for Dynamic Load Current Testing with a Benchtop Power Supply
Speakers: Heidi Barnes (Keysight Technologies), Jack Carrel (Xilinx), Steve Sandler (Picotest)
Location: Ballroom B
Track: 12. Applying Test & Measurement Methodology, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Accelerate Interposer Design Efficiency Using Neural Networks & Genetic Algorithms
Speakers: Xiao-Ming Gao (Intel Corporation), Naveid Rahmatullah (Intel), Taylor Hogan (Cadence)
Location: Ballroom D
Track: 14. Machine Learning for Microelectronics, Signaling & System Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Analysis Through Simulation of High Speed DDR4 Link Failures Due to Via Stubs in the Channel
Speaker: Benjamin Dannan (Diversey Inc.)
Location: Ballroom A
Track: 07. Optimizing High-Speed Serial Design, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Analysis on Power Via Induced Quasi-Quarter-Wavelength Resonance for Crosstalk Reduction
Speakers: DongHyun (Bill) Kim (Missouri University of Science and Technology), Siqi Bai (Missouri University of Science and Technology), Junda Wang (Missouri University of Science and Technology), Junyong Park (Korea Advanced Institute of Science and Technology), Jongjoo Lee (Missouri University of Science and Technology), Bichen Chen (Facebook, Inc.), Srinivas Venkataraman (Facebook, Inc.), Xu Wang (Facebook, Inc.), Siqi Bai (Missouri University of Science and Technology)
Location: Ballroom E
Track: 13. Modeling & Analysis of Interconnects, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Impedance Mask-Based PDN Specifications for Memory Modules & PCBs
Speaker: Larry D Smith (Micron)
Location: Ballroom G
Track: 10. Power Integrity in Power Distribution Networks, 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Jitter Behavior & Characterization of On-Die High Speed Clock Signal for Digital Synchronous Design
Speakers: Anna Wong (Xilinx Inc), Gordon Tsui (Xilinx Inc.)
Location: Ballroom C
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Maximizing DDR5 Eye-Opening by Identifying Buffer Settings Using Optimization Algorithms
Speakers: Nitin Bhagwath (Mentor Graphics), Daniel De Araujo (Mentor Graphics), Jayaprakash Balachandran (Cisco), Baekkyu Choi (Micron)
Location: Ballroom F
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Location: Mission City Ballroom
Track: Networking Lunch
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
A Novel Design Methodology That Solves Todays System-Level Analysis Challenges
Speakers: Jim Godwin (Texas Instruments), Chanakya K V (Texas Instruments), RItabrata Bhattacharya (Cadence Design Systems), Taranjit Kukal (Cadence Design Systems)
Location: Ballroom E
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speaker: Jun So Pak (Samsung Elecronics Co)
Location: Ballroom F
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Minimally Specification Compliant Behavioral Modeling Methodology & Its Applications in HSIO
Speakers: Xinjun Zhang (Intel Corp), Mo Liu (Intel Corp), Kai Xiao (Intel Corp), Zhichao Zhang (Intel Corp), Wenzhi Wang (Intel Corp.), Yang Wu (Intel Corp.)
Location: Ballroom C
Track: 13. Modeling & Analysis of Interconnects
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Optimized Wireless System Design with Minimal RFI Using Antenna Near Field Approach
Speakers: Deepak Pai Hosadurga (Amazon Lab126), Jagan Rajagoplan (Amazon Lab126)
Authors: Akshay Mohan (Amazon Lab126), Qiaolei Huang (Amazon Lab126)
Location: Ballroom A
Track: 11. Electromagnetic Compatibility/Mitigating Interference
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Performance Comparison Between QSFP-DD & OSFP for 56G-PAM4 Applications
Speakers: Xu Jiang (Luxshare-Ict), Hong Ahn (Xilinx), Kelvin Qiu (Cisco), Andy Nowak (Luxshare-Ict), Melvin Li (Luxshare-Ict), Geoff (Xilinx)
Location: Ballroom B
Track: 07. Optimizing High-Speed Serial Design, 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: Igal Fridman (Major Technology Company), Alex Manukovsky (Intel), Shimon Mordooch (Harmonic Video Networks), Robert Carter (Oak-Mitsui Technologies)
Location: Ballroom G
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Real-Time Jitter Analysis Using Hardware Based Clock Recovery & Serial Pattern Trigger
Speaker: michael schnecker (Rohde & Schwarz)
Location: Ballroom D
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Radiated Emissions Troubleshooting & Pre-Compliance Testing
Speakers: Ken Wyatt (Wyatt Technical Services LLC), Dylan Stinson (Tektronix)
Location: Chiphead Theater
Track: Chiphead Theater, 11. Electromagnetic Compatibility/Mitigating Interference
Format: Chiphead Theater Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Speaker: Mohiuddin Mazumder (Intel Corporation)
Location: Ballroom C
Track: 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC), 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
COM & Reference Transmitter/Receiver/Package for 106/112-Gbps Long-Reach & Chip-to-Chip Links
Speakers: Hsinho Wu (Intel Corp), Mike Li (Intel Corp), Masashi Shimanouchi (Intel Corp)
Location: Ballroom D
Track: 09. High-Speed Signal Processing, Equalization & Coding, 07. Optimizing High-Speed Serial Design
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Speakers: Kevin Cai (Cisco Systems, Inc.), Anna Gao (Cisco Systems, Inc.), Bidyut Sen (Cisco Systems, Inc.), Feng Ling (Xpeedic Technology, Inc.), Joshua Wan (Xpeedic Technology, Inc.)
Location: Ballroom E
Track: 13. Modeling & Analysis of Interconnects, 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Jitter Measurements with Decision Feedback Equalization
Speaker: Kalev Sepp (Sepson Analytics LLC)
Author: John Calvin (Keysight Technologies)
Location: Ballroom F
Track: 12. Applying Test & Measurement Methodology, 08. Measurement, Simulation & Improving Jitter, Noise & BER (Pre & Post FEC)
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Real Time On-Die Power & Thermal Profiling for Machine Learning Design Applications
Speakers: Thomas To (Xilinix), Ajay Kumar Sharma (Xilinx), Nitin Srivastava (Xilinx)
Location: Ballroom B
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Self-Evolution Cascade Deep Learning for SerDes Adaptive Equalization
Speakers: Bowen Li (North Carolina State University), Brandon Jiao (Xilinx, Inc.), Chih-Hsun Chou (Xilinx)
Authors: Romi Mayder (Xilinx, Inc.), Paul Franzon (North Carolina State University), Geoff (Geoffrey) Zhang (Xilinx, Inc.)
Location: Ballroom G
Track: 14. Machine Learning for Microelectronics, Signaling & System Design, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Study of Advanced DSP & FEC Algorithms for 112G PAM4 Links
Speakers: Yuchun Lu (Huawei Technologies), Zhilei Huang (Huawei Technologies)
Location: Ballroom A
Track: 07. Optimizing High-Speed Serial Design, 09. High-Speed Signal Processing, Equalization & Coding
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass
Panel – Electronic Design Automation Roadmap for Machine Learning & AI Standardization
Speakers: Leigh Anne Clevenger (Silicon Integration Initiative, Inc.), Rhett Davis (North Carolina State University), Leon Stok (IBM), John Ellis (Silicon Integration Initiative, Inc.), Norman Chang (ANSYS), Ramond Rodríguez (Intel)
Location: Ballroom D
Track: 14. Machine Learning for Microelectronics, Signaling & System Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Panel – PCIe 32G & 64G: System Design & Test Challenges
Speakers: Steve Krooswyk (Samtec), Rita Horner (Synopsys), Ying Li (NVIDIA), Dan Froelich (Tektronix), Pegah Alavi (Keysight), Patrick Casher (Foxconn Interconnect Technology), David Bouse (Tektronix), Rick Eads (Keysight), Tim Wig (Intel)
Location: Ballroom F
Track: 07. Optimizing High-Speed Serial Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass
Panel – What is Needed for the Next Speed Node Past 112 Gbps & up to 224 Gbps?
Speakers: Cathy Liu (Broadcom Inc.), Jane Lim (Cisco Systems), Rob Stone (Broadcom Inc.), Richard Ward (Intel), Pervez Aziz (Nvidia), Lars Thon (LT Engineering)
Location: Ballroom G
Track: 09. High-Speed Signal Processing, Equalization & Coding, 07. Optimizing High-Speed Serial Design
Format: Panel Discussion
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass, Boot Camp Pass, Expo Pass