April 5-7, 2022|Santa Clara Convention Center| Santa Clara, CA
DesignCon 2022 Schedule Builder
Speaker: Mike Li (Intel)
Location: Ballroom D
Track: 08. Measurement & Simulation Techniques for Analyzing Jitter, Noise & BER
Format: Tutorial
Theme : High-speed Communications
Education Level: All
Pass Type: All Access Pass
Tutorial – PAM6 Signaling: A Potential Candidate at 224Gbps
Speakers: Geoff Zhang (Xilinx), Hongtao Zhang (Xilinx), Hongtao Zhang (Xilinx), Hongtao Zhang (Xilinx)
Location: Ballroom F
Track: 09. High-Speed Signal Processing, Equalization & Coding/FEC, 07. Optimizing High-Speed Link Design
Format: Tutorial
Theme : Data Centers
Education Level: All
Pass Type: All Access Pass
Keynote – Progress Enabled: The Convergence of Photonic & Electronic ICs
Keynote: John Bowers (University of California, Santa Barbara)
Location: Mission City Ballroom
Track: Keynote, 03. Integrating Photonics & Wireless in Electrical Design
Format: Keynote
Theme : Data Centers, High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
In Search of the Holy Grail: Laminate Dk & Df Values that You Can Trust
Speaker: Bill Hargin (Z-zero)
Location: Chiphead Theater
Track: Chiphead Theater
Format: Chiphead Theater
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
De-embedding Method for 224G High Bandwidth
Speaker: Jinlong Li (ZTE)
Authors: Jianwei Huang (ZTE), Xin Kang (ZTE), Zhongmin Wei (ZTE), Bi Yi (ZTE), Yu Bi (ZTE)
Location: Chiphead Theater
Track: 12. Applying Test & Measurement Methodology
Format: Lightning Talk
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Optimal PDN Design Method for Mobile Phone Based on Q-learning Algorithm with Dynamic PI Simulation
Speaker: Jaeyoung Shin (Samsung Electronics)
Location: Chiphead Theater
Track: 10. Power Integrity in Power Distribution Networks, 14. Machine Learning for Microelectronics, Signaling & System Design
Format: Lightning Talk
Theme : Consumer Electronics
Education Level: Introductory
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Tutorial – OSFP/QSFP-DD 112G PAM4 Channel for 800G System Applications
Speakers: Xu Jiang (Luxshare-Ict), Andy Nowak (Luxshare-Ict), Ivan Madrigal (Xilinx), Dana Bergey (Luxshare-Ict), Charles Grant (Luxshare-Ict), Geoffrey Zhang (Xilinx)
Location: Ballroom F
Track: 13. Modeling & Analysis of Interconnects, 07. Optimizing High-Speed Link Design
Format: Tutorial
Theme : High-speed Communications
Education Level: All
Pass Type: All Access Pass
Tutorial – Over the Air Testing of 5G AiP Modules in High-volume Manufacturing
Speaker: Jose Moreira (Advantest)
Location: Ballroom E
Track: 03. Integrating Photonics & Wireless in Electrical Design
Format: Tutorial
Theme : 5G
Education Level: All
Pass Type: All Access Pass
Tutorial – The Real World of Power Integrity & Signal Integrity Working Together
Speakers: Heidi Barnes (Keysight Technologies), Steve Sandler (Picotest.com), Jack Carrel (Xilinx)
Location: Ballroom D
Track: 10. Power Integrity in Power Distribution Networks
Format: Tutorial
Theme : Automotive, Data Centers
Education Level: All
Pass Type: All Access Pass
Risks & Enablers of Server Platform Design in Immersion Cooling
Speaker: Shaohua Li (Intel)
Authors: Dan Liu (Alibaba Inc.), Yangfan Zhong (Alibaba Inc.), Honghao Cao (Alibaba Inc.)
Location: Chiphead Theater
Track: 13. Modeling & Analysis of Interconnects, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Lightning Talk
Theme : Data Centers, Infrastructure
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Panel – AMI Models & the Seven-year Itch
Speaker: Donald Telian (SiGuys)
Location: Ballroom F
Track: 02. Chip I/O & Power Modeling, 07. Optimizing High-Speed Link Design
Format: Panel Discussion
Theme : Data Centers, High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Panel – CXL & PCIe Technologies: The Next Generation of Interconnects
Speakers: Debendra Das Sharma (Intel), Scott Knowlton (Synopsys), Ishwar Agarwal (Microsoft), Kurt Lender (Intel)
Location: Ballroom D
Track: 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations, 07. Optimizing High-Speed Link Design
Format: Panel Discussion
Theme : Data Centers
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Panel – The Case of the Closing Eyes: PAM4 is Here!
Speakers: Chris Loberg (Tektronix, Inc.), Cathy Liu (Broadcom Inc.)
Location: Ballroom G
Track: 08. Measurement & Simulation Techniques for Analyzing Jitter, Noise & BER, 12. Applying Test & Measurement Methodology
Format: Panel Discussion
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Speaker: Taein Shin (KAIST)
Authors: Hyunwook Park (KAIST), Seongguk Kim (KAIST), Keunwoo Kim (KAIST), Keeyoung Son (KAIST), Joungho Kim (KAIST)
Location: Ballroom D
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Theme : Consumer Electronics, High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Speaker: Seongguk Kim (Korea Advanced Institute of Science and Technology)
Authors: Hyunwook Park (Korea Advanced Institute of Science and Technology), Taein Shin (Korea Advanced Institute of Science and Technology), Daehwan Lho (Korea Advanced Institute of Science and Technology), Keeyoung Son (Korea Advanced Institute of Science and Technology), Keunwoo Kim (Korea Advanced Institute of Science and Technology), Minsu Kim (Korea Advanced Institute of Science and Technology), Joonsang Park (Korea Advanced Institute of Science and Technology), Joungho Kim (Korea Advanced Institute of Science and Technology)
Location: Ballroom G
Track: 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations, 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Theme : Data Centers
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
A Step-by-step Guide to a Novel Lab Correlated PDN Co-simulation Methodology
Speakers: Idan Ben Ezra (Broadcom Semiconductors), John Phillips (Cadence Design Systems Inc.), Ilan Wolff (Arista Networks)
Location: Ballroom F
Track: 10. Power Integrity in Power Distribution Networks, 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Theme : Data Centers
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Onchip ESD Protection Structure Modeling Methodology
Speaker: Zhekun Peng (EMC Laboratory, Missouri S&T)
Author: DongHyun Kim (EMC laboratory, Missouri S&T)
Location: Ballroom E
Track: 11. Electromagnetic Compatibility & Interference
Format: Technical Session
Theme : Security
Education Level: Introductory
Pass Type: 2-Day Pass, All Access Pass
Speaker: Christopher DiMinico (MC Communications/PHY-SI LLC/SenTekse)
Authors: Mike Resso (Keysight Technologies), Curtis Donahue (Rohde & Schwarz), Michael Klempa (Amphenol ICC), Oj Danzy (Keysight Technologies), Richard Mellitz (Samtec), Mike Sapozhnikov (Cisco Systems), David Nozadze (Cisco Systems), Amendra Koul (Cisco Systems), Adee Ran (Cisco Systems), Mike Rowlands (Amphenol HSC), Upen Reddy Kareti (Cisco Systems)
Location: Ballroom H
Track: 13. Modeling & Analysis of Interconnects, 12. Applying Test & Measurement Methodology
Format: Technical Session
Theme : High-speed Communications
Education Level: Introductory
Pass Type: 2-Day Pass, All Access Pass
Accurate Correlation Between SI Simulation & Measurement in High-speed Backplane Connector Designs
Speakers: Leon (samtec), Mick (Samtec)
Location: Ballroom G
Track: 13. Modeling & Analysis of Interconnects, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
DDR4-3200 FPGA-based System with Interposer Power Aware SI Simulation to Measurement Correlation
Speakers: Benjamin Dannan (Northrop Grumman), Randy White (Keysight Technologies)
Author: Hermann Ruckerbauer (Eye Know How)
Location: Ballroom E
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 08. Measurement & Simulation Techniques for Analyzing Jitter, Noise & BER
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Generalized ccICN (Component Contribution Integrated Crosstalk Noise)
Author: Se-Jung Moon (Intel)
Location: Ballroom H
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Theme : Infrastructure
Education Level: Introductory
Pass Type: 2-Day Pass, All Access Pass
Integral Surface Roughness Modeling Method for Copper Foils
Speaker: Yuanzhuo Liu (Missouri University S&T)
Location: Ballroom D
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages
Format: Technical Session
Theme : Data Centers, High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Speaker: Kyle Chen (Microsoft)
Location: Ballroom F
Track: 07. Optimizing High-Speed Link Design, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Theme : Consumer Electronics
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Keynote – The Realities of AI & Machine Learning: Cut Through the Hype & Move to Production
Keynote: Laurence Moroney (Google)
Location: Mission City Ballroom
Track: Keynote, 14. Machine Learning for Microelectronics, Signaling & System Design
Format: Keynote
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Five Tips for Power Integrity Measurements on a Budget
Speaker: Eric Bogatin (University of Colorado, Boulder)
Location: Chiphead Theater
Track: Chiphead Theater
Format: Chiphead Theater
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Speakers: Benjamin Dannan (Northrop Grumman), James Kuszewski (Northrop Grumman), Ramzi Vincent (Northrop Grumman), William McCaffrey (Northrop Grumman), Albert Park (Northrop Grumman)
Author: Shin Wu (Northrop Grumman)
Location: Ballroom F
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 02. Chip I/O & Power Modeling
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Speaker: Joonsang Park (Korea Advanced Institute of Science and Technology, KAIST)
Authors: Minsu Kim (Korea Advanced Institute of Science and Technology, KAIST), Seonguk Choi (Korea Advanced Institute of Science and Technology, KAIST), Jihun Kim (Korea Advanced Institute of Science and Technology, KAIST), Haeyoen Kim (Korea Advanced Institute of Science and Technology, KAIST), Hyunwook Park (Korea Advanced Institute of Science and Technology, KAIST), Seongguk Kim (Korea Advanced Institute of Science and Technology, KAIST), Taein Shin (Korea Advanced Institute of Science and Technology, KAIST), Joungho Kim (Korea Advanced Institute of Science and Technology, KAIST)
Location: Ballroom E
Track: 14. Machine Learning for Microelectronics, Signaling & System Design, 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Theme : Autonomous, Data Centers
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Long-haul Inter-domain Power Noise
Authors: Ethan Koether (Project Kuiper - Amazon), Kristoffer Skytte (Cadence), Joseph Hartman (Oracle Corporation), Shirin Farrahi (Cadence), Sammy Hindi (Ampere Computing), Istvan Novak (Samtec), Mario Rotigni (STMicroelectronics), John Phillips (Cadence)
Location: Ballroom H
Track: 10. Power Integrity in Power Distribution Networks, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Theme : Data Centers
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Performance Assessment of W-band Antennas on Low-loss Inhomogeneous PCB Substrates
Speaker: Chudy Nwachukwu (ITEQ)
Authors: Maria Serrano-Serrano (INAOE), Edgar Colín-Beltrán (Conacyt-INAOE), Reydezel Torres-Torres (INAOE)
Location: Ballroom D
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Theme : 5G, High-speed Communications
Education Level: Advanced
Pass Type: 2-Day Pass, All Access Pass
Receiver Calibration & Testing Methodologies Comparison for PAM-4 IOs
Speaker: Marianne Nourzad (Intel Corp)
Authors: Hsinho Wu (Intel Corp), Christiaan Bil (Intel Corp), Joseph Boon Hock (Intel Corp), Masachi Shimanouchi (Intel Corp), Karsten Stangel (Intel Corp), Jong-Ru Guo (Intel Corp), Mohiuddin Mazumder (Intel Corp), Zuoguo (Joe) Wu (Intel Corp), Mike Li (Intel Corp)
Location: Ballroom G
Track: 12. Applying Test & Measurement Methodology, 08. Measurement & Simulation Techniques for Analyzing Jitter, Noise & BER
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Challenges of Automated Stressed Receiver Tolerance Testing: NRZ, PAM4 & Beyond
Speakers: Wolfgang Köbele (BitifEye R&D GmbH), Anton M. Unakafov (BitifEye Digital Test Solutions GmbH), Ransom Stephens (BitifEye Digital Solutions GmbH /Ransom’s Notes), Parthasarathy Raju (BitifEye Research & Development)
Authors: Bernhard Leibold (BitifEye R&D GmbH), Hermann Stehling (BitifEye Digital Test Solutions GmbH)
Location: Ballroom F
Track: 08. Measurement & Simulation Techniques for Analyzing Jitter, Noise & BER, 12. Applying Test & Measurement Methodology
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Next Generation 224Gbps-PAM4 SERDES, Channel & Link Systems
Author: Mike Li (Intel)
Location: Ballroom H
Track: 09. High-Speed Signal Processing, Equalization & Coding/FEC
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Noise Coupling Path Visualization in Complex Electronic Systems
Speakers: Seungtaek Jeong (Missouri S&T), Chulsoon Hwang (Missouri S&T)
Authors: Hwanwoo Shim (Samsung Electronics), Seyoon Cheon (Samsung Electronics), Myeonghwan Kim (Samsung Electronics)
Location: Ballroom E
Track: 11. Electromagnetic Compatibility & Interference, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Theme : Consumer Electronics, High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Speaker: Aleksey Tyshchenko (SeriaLink Systems)
Authors: David Halupka (SeriaLink Systems), Venu Balasubramonian (Marvell Semiconductor), Lenin Patra (Marvell Semiconductor)
Location: Ballroom D
Track: 02. Chip I/O & Power Modeling, 07. Optimizing High-Speed Link Design
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Utilizing Millimeter-wave RF Properties to Optimize Very High-speed Digital Designs
Author: John Coonrod (Rogers Corporation)
Location: Ballroom G
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages, 07. Optimizing High-Speed Link Design
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
EMI Qualification of QSFP & OSFP Electrical/optical Modules
Authors: David Pommerenke (Graz University of Technology), David Pommerenke (Juniper Networks), Federico Centola (Google LLC), Tamar Makharashvili (Google LLC), DongHyun Kim (Missouri S&T), Bertwin Novak (TU Graz), Franz Gabalier (Graz University of Technology), David Pommerenke (Missouri S&T), Xiao Li (cisco), David Pommerenke (Juniper Networks), Kaustav Ghosh (Juniper Networks)
Location: Ballroom E
Track: 11. Electromagnetic Compatibility & Interference, 12. Applying Test & Measurement Methodology
Format: Technical Session
Theme : Data Centers, High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Impacts of Optical-domain Crosstalk on High-performance Silicon Photonic Transceiver
Authors: Zhaoyin Daniel Wu (Xilinx Inc), Hongtao Zhang (Xilinx Inc), Chuan Xie (XILINX INC.), Mayank Raj (Xilinx Inc), Parag Upadhyaya (Xilinx Inc), Yohan Frans (Xilinx Inc.), Geoff Zhang (Xilinx Inc)
Location: Ballroom G
Track: 03. Integrating Photonics & Wireless in Electrical Design, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
PCB Manufacturing Design Guidelines for Cost Reduction in Immersion Cooling
Speaker: Eddie Mok (Wus Printed Circuit)
Authors: Dan Liu (Alibaba Inc.), Dan Liu (Alibaba Inc.), Dan Liu (Alibaba Inc.), Xiaopeng Li (Alibaba Inc.)
Location: Ballroom D
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Theme : Data Centers, High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Security Integrity Analytics by Thermal Side-channel Simulation: An ML-augmented Auto-POI Approach
Speakers: Jimin Wen (Ansys), Norman Chang (Ansys), Lang Lin (Ansys), David Luo (National Taiwan University), Jyh-Shing Roger Jang (National Taiwan University), Hua Chen (Ansys)
Location: Ballroom H
Track: 14. Machine Learning for Microelectronics, Signaling & System Design, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Theme : Automotive, Security
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
VNA Calibration Essentials for Practicing Engineers
Speaker: Julian Lechner (Samtec)
Authors: Travis S Ellis (Samtec), Jason Sia (Samtec), Pete Pupalaikis (Nubis), Gustavo Blando (Samtec), Istvan Novak (Samtec)
Location: Ballroom F
Track: 12. Applying Test & Measurement Methodology
Format: Technical Session
Theme : High-speed Communications
Education Level: Introductory
Pass Type: 2-Day Pass, All Access Pass
Authors: Jayanth Kalyan (Intel Corporation), Vishram Pandit (Intel Corporation), Ashwini Anil Kumar (Intel Corporation), Andrea Astua Moya (Intel Corporation)
Location: Ballroom D
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Theme : Consumer Electronics
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Four Very Low-cost Technology Solutions for SI Applications
Speaker: Eric Bogatin (CU)
Authors: Melinda Piket-May (CU), Aditya Rao (CU), Julio Puentes (CU)
Location: Ballroom H
Track: 12. Applying Test & Measurement Methodology, 04. Advances in Materials & Processing for PCBs, Modules & Packages
Format: Technical Session
Theme : High-speed Communications
Education Level: Introductory
Pass Type: 2-Day Pass, All Access Pass
PDN Design Optimization from an IC to a PCB for a Mixed-reality Display Subsystem
Speaker: Junho Lee (Microsoft)
Location: Ballroom E
Track: 10. Power Integrity in Power Distribution Networks, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Theme : Consumer Electronics
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Proper Ground Return Via Placement for 40+ Gbps Signaling
Authors: Donald Telian (SiGuys), Michael Steinberger (MathWorks)
Location: Ballroom F
Track: 07. Optimizing High-Speed Link Design, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Theme : Data Centers, High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Validation Shift-left: Enabling Early SerDes Mixed-signal Validation
Speaker: David Halupka (SeriaLink Systems)
Authors: Aleksey Tyshchenko (SeriaLink Systems), Richard Allred (Mathworks), Marc Erickson (Mathworks), Tripp Worrell (MathWorks), Barry Katz (Mathworks / SiSoft), Jesson John (MathWorks, Inc.), Ranjan Sahoo (Intel Technologies)
Location: Ballroom G
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 07. Optimizing High-Speed Link Design
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Panel – Implementing a Digital Transformation Framework for Automotive Applications
Moderator: Jean-Marie Brunet (Siemens EDA)
Panelists: Sam Heidari Ph.D. (Lumotive), Arun Mulpur (MathWorks, Inc.), Veerbhan Kheterpa, Soshun Arai (Tier IV)
Speaker: Hieu Tran (Viosoft)
Location: Ballroom C
Track: Drive World - Advanced Automotive
Format: Panel Discussion
Theme : 5G, Automotive
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Speakers: Heidi Barnes (Keysight Technologies), Istvan Novak (Samtec), Eric Bogatin (Teledyne LeCroy), Steve Sandler (Picotest.com), Jim DeLap (ANSYS)
Location: Ballroom H
Track: 10. Power Integrity in Power Distribution Networks, 12. Applying Test & Measurement Methodology
Format: Panel Discussion
Theme : Automotive, Infrastructure
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Panel – OIF Electrical I/O Specifications: Progress on CEI 112Gbps & 224Gbps
Speaker: Nathan Tracy (TE Connectivity)
Location: Ballroom D
Track: 09. High-Speed Signal Processing, Equalization & Coding/FEC, 07. Optimizing High-Speed Link Design
Format: Panel Discussion
Theme : Data Centers, High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
112G-PAM4-QSFP Interconnect: A Study in Air Cooling & Immersion Cooling
Speakers: Andy Nowak (Luxshare-ICT), Xu Jiang (Luxshare-ICT)
Authors: Dan Liu (Alibaba Inc.), Liang Chen (Alibaba Inc.), Yangfan Zhong (Alibaba Inc.), Huanhuan Shen (Luxshare-ICT), Melvin Li (Luxshare-ICT)
Location: Ballroom F
Track: 07. Optimizing High-Speed Link Design, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Theme : Data Centers
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Equalizer (Tx/Rx) Optimization at 112Gbps
Speakers: John Calvin (Keysight Technologies), Ryan Chodora (Keysight Technologies)
Author: Kalev Sepp (Sepson Analytics)
Location: Ballroom H
Track: 12. Applying Test & Measurement Methodology, 09. High-Speed Signal Processing, Equalization & Coding/FEC
Format: Technical Session
Theme : Data Centers, High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Speaker: Jihun Kim (Korea Advanced Institute of Science and Technology)
Authors: Minsu Kim (Korea Advanced Institute of Science and Technology), Joungho Kim (KAIST)
Location: Ballroom G
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Imitate Expert Policy & Learn Beyond: A Practical PDN Optimizer by Imitation Learning
Speaker: Haeyoen Rachel Kim (KAIST)
Authors: Minsu Kim (KAIST), Subin Kim (Samsung Global Technology Center (GTC)), Hyunwook Park (KAIST), Joungho Kim (KAIST)
Location: Ballroom D
Track: 14. Machine Learning for Microelectronics, Signaling & System Design, 10. Power Integrity in Power Distribution Networks
Format: Technical Session
Theme : Autonomous, High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
PCB Stackup & Launch Optimization in High-speed PCB Designs
Speaker: Shawn Tucker (Samtec)
Authors: Travis Ellis (Samtec), Shawn Tucker (Samtec)
Location: Ballroom E
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages, 07. Optimizing High-Speed Link Design
Format: Technical Session
Education Level: Advanced
Pass Type: 2-Day Pass, All Access Pass
How to Optimize TxFFE & What We Can Learn From the Optimization
Speakers: Anton M. Unakafov (BitifEye Digital Test Solutions GmbH), Ransom Stephens (BitifEye Digital Test Solutions GmbH)
Authors: Sergio Cinà (BitifEye Digital Test Solutions GmbH), Wolfgang Kobele (BitifEye Digital Test Solutions GmbH), Hermann Stehling (BitifEye Digital Test Solutions GmbH)
Location: Ballroom E
Track: 09. High-Speed Signal Processing, Equalization & Coding/FEC, 07. Optimizing High-Speed Link Design
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Magnetic Near-field Evaluation Methodology for Integrated Circuit In-package Coupling Assessment
Speaker: Maryna Nesterova (Aprel Inc)
Authors: Yuliya Nesterova (Carleton Univeristy), Stuart Nicol (Aprel Inc)
Location: Ballroom D
Track: 11. Electromagnetic Compatibility & Interference, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Theme : Consumer Electronics
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
New Power Integrity Methodology & Mitigation Effect of PDN Voltage Decay
Speaker: Iliya Zamek (ZI_Consulting)
Location: Ballroom G
Track: 10. Power Integrity in Power Distribution Networks, 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Theme : Data Centers
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Speaker: Sameh Elnaggar (Semtech)
Location: Ballroom F
Track: 13. Modeling & Analysis of Interconnects, 12. Applying Test & Measurement Methodology
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Understanding the Effect of Temperature on Permittivity & Loss of Dielectric Substrates
Speaker: Allen F. Horn III (Rogers Corporation)
Author: Christopher J. caisse (Rogers Corporation)
Location: Ballroom H
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages
Format: Technical Session
Theme : Automotive
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Keynote – Space Tech: Present & Future
Keynote: José Morey (NASA, IBM, Hyperloop Transportation, Liberty BioSecurity Health and Technology)
Location: Mission City Ballroom
Track: Keynote
Format: Keynote
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
COM-based IBIS-AMI for 106/112Gbps System Compliance
Speaker: Vijay Kasturi (Intel)
Author: Hsinho Wu (Intel)
Location: Ballroom D
Track: 02. Chip I/O & Power Modeling
Format: Technical Session
Education Level: Advanced
Pass Type: 2-Day Pass, All Access Pass
Authors: Minsu Kim (Korea Advanced Institute of Science and Technology), Keeyoung Son (KAIST), Jihun Kim (KAIST), Joonsang Park (KAIST), Seonguk Choi (KAIST), Haeyoen Kim (KAIST), Joungho Kim (KAIST), Subin Kim (Samsung Global Technology Center (GTC))
Location: Ballroom E
Track: 14. Machine Learning for Microelectronics, Signaling & System Design
Format: Technical Session
Theme : Consumer Electronics
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Practical Methods of Estimating Dynamic Current for Calculating PDN Target Z
Speakers: Heidi Barnes (Keysight Technologies), Steve Sandler (Picotest.com)
Author: Jack Carrel (Xilinx)
Location: Ballroom H
Track: 10. Power Integrity in Power Distribution Networks, 02. Chip I/O & Power Modeling
Format: Technical Session
Theme : Automotive
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Speaker: Keeyoung Son (Korea Advanced Institute of Science and Technology)
Authors: Joungho Kim (Korea Advanced Institute of Science and Technology), Keunwoo Kim (Korea Advanced Institute of Science and Technology), Minsu Kim (Korea Advanced Institute of Science and Technology), Taein Shin (Korea Advanced Institute of Science and Technology), Hyunwook Park (Korea Advanced Institute of Science and Technology), Seongguk Kim (Korea Advanced Institute of Science and Technology)
Location: Ballroom F
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Theme : Consumer Electronics
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Transmitter Jitter Measurement Methodologies for PAM-4 IOs
Speaker: Marianne Nourzad (Intel Corp)
Authors: Hsinho Wu (Intel Corp), Jong-Ru Guo (Intel Corp), Zuoguo (Joe) Wu (Intel Corp), John Yang (Intel Corp), Masachi Shimanouchi (Intel Corp), Mohiuddin Mazumder (Intel Corp), Mike Li (Intel Corp)
Location: Ballroom G
Track: 08. Measurement & Simulation Techniques for Analyzing Jitter, Noise & BER, 12. Applying Test & Measurement Methodology
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
A Study on 224G Channel Characteristics
Speaker: Changgang Yin (ZTE)
Authors: Xiaoxuan Liu (ZTE), Zhongmin Wei (ZTE), Feng Wu (Sanechips/ZTE), Ming Zheng (ZTE)
Location: Chiphead Theater
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 13. Modeling & Analysis of Interconnects
Format: Lightning Talk
Theme : High-speed Communications
Education Level: Advanced
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Electro-optic & Custom Photonic Co-design in Monolithic Silicon Photonics Technology
Authors: Jigesh K. Patel (Synopsys, Inc.), Jignesh Patel (GlobalFoundries), Enrico Ghillino (Synopsys, Inc.), Pablo Mena (Synopsys, Inc.), Khaled Nikro (Synopsys, Inc.), Dan Herrmann (Synopsys, Inc.), Robert Scarmozzino (Synopsys, Inc.), Rino Sunarto (Synopsys, Inc.), Twan Korthorst (Synopsys, Inc.), Dwight Richards (College of Staten Island - CUNY), Greg O’Malley (GlobalFoundries), Frederick G Anderson (GlobalFoundries)
Location: Ballroom E
Track: 03. Integrating Photonics & Wireless in Electrical Design, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Theme : Data Centers
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Investigation of Low-etch or Non-oxide Surface Treatment on Stripline Insertion Loss
Speaker: Xiaoning Ye (Intel Corp)
Location: Ballroom G
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages, 07. Optimizing High-Speed Link Design
Format: Technical Session
Theme : Data Centers
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Reflecting on Reflections: An Evaluation of New & Standardized Metrics
Speakers: Steve Krooswyk (samtec), Beomtaek Lee (Intel)
Authors: Hansel Dsilva (Achronix Semiconductor Corporation), Rich Mellitz (Samtec), Adam Gregory (Samtec), Stephen Hall (Intel)
Location: Ballroom D
Track: 07. Optimizing High-Speed Link Design, 08. Measurement & Simulation Techniques for Analyzing Jitter, Noise & BER
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
System Co-design for Sleek Detachable/tablet Reference Design
Authors: Aiswarya Pious (Intel Corporation), Vishram Pandit (Intel Corporation), Tarakesava Reddy (Intel Corporation)
Location: Ballroom F
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Theme : Consumer Electronics
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Transient vs. Statistical: A Comparative Study on Practical Parallel Link Qualification Techniques
Speaker: Ashkan Hashemi (Amazon)
Location: Ballroom H
Track: 08. Measurement & Simulation Techniques for Analyzing Jitter, Noise & BER, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Theme : Consumer Electronics, High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Speaker: Casey Morrison (Astera Labs)
Location: Chiphead Theater
Track: 07. Optimizing High-Speed Link Design, 09. High-Speed Signal Processing, Equalization & Coding/FEC
Format: Chiphead Theater
Theme : Data Centers
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
224Gbps-PAM4 End-to-end Channel Solutions for High-density Networking System
Speaker: Jenny Jiang (Intel)
Authors: Mike Li (Intel), Ed Milligan (Intel), John Medina (Intel), Qian Ding (Intel), Kemal Aygun (Intel), Hsinho Wu (Intel), Masashi Shimanouchi (Intel)
Location: Ballroom H
Track: 07. Optimizing High-Speed Link Design, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
A T-coil Enhanced 18Gbps Memory Interface with Tx Bandwidth Extension & Rx Training Technique
Speaker: Billy Koo (Samsung Electronics)
Location: Ballroom E
Track: 05. Advanced I/O Interface Design for Memory & 2.5D/3D/SiP Integrations, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Theme : Autonomous
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Speaker: Masashi Shimanouchi (Intel)
Authors: Mike Li (Intel), Hsinho Wu (Intel)
Location: Ballroom D
Track: 08. Measurement & Simulation Techniques for Analyzing Jitter, Noise & BER
Format: Technical Session
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Effective Intra-pair Skew, EIPS & Intra-pair Skew Modeling Method
Author: Se-Jung Moon (Intel)
Location: Ballroom G
Track: 13. Modeling & Analysis of Interconnects, 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Theme : Infrastructure
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Novel Power-integrity Solutions for Multi-HSIO with Silicon Co-relation
Speakers: Mukesh Moorthy (Intel Corporation), Manjunath J (Intel Corporataion)
Location: Ballroom F
Track: 10. Power Integrity in Power Distribution Networks, 06. System Co-Design: Modeling, Simulation & Measurement Validation
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Applications of High Bandwidth AWGs in Receiver Testing: Tricks of the Trade
Speakers: Anton M. Unakafov (BitifEye Digital Test Solutions GmbH), Ransom Stevens (BitifEye Digital Test Solutions GmbH), Julien Henaut (BitifEye Digital Test Solutions GmbH), Afshin Attarzadeh (BitifEye Digital Test Solutions GmbH)
Authors: Nithin Parameshwaraiah (BitifEye Digital Test Solutions GmbH), Valentina A. Unakafova (BitifEye Digital Test Solutions GmbH)
Location: Ballroom E
Track: 12. Applying Test & Measurement Methodology, 07. Optimizing High-Speed Link Design
Format: Technical Session
Theme : High-speed Communications
Education Level: Introductory
Pass Type: 2-Day Pass, All Access Pass
Experiment & Simulation Studies on Resonances due to Period Structure in PCBs
Speaker: Yifeng Li (Shennan Circuits Co., Ltd)
Authors: Kai Li (Shennan Circuits Co., Ltd), Wei He (Xpeedic Technology CO.,LTD.), Xuechuan Han (Shennan Circuits Co., Ltd), Dazhou Ding (Shennan Circuits Co., Ltd), Zhouxiang Su (Xpeedic Technology CO.,LTD.)
Location: Ballroom D
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages, 13. Modeling & Analysis of Interconnects
Format: Technical Session
Theme : Data Centers, High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Exploring the Requirements for 224Gbps Channel Characterization Using Simulations & Measurements
Speakers: Rick Rabinovich (Keysight Technologies), Mike Resso (Keysight Technologies)
Authors: Luis Boluña (Keysight Technologies), John Calvin (Keysight Technologies), Francesco de Paulis (University of L'Aquila), Richard Mellitz (Samtec)
Location: Ballroom F
Track: 07. Optimizing High-Speed Link Design, 12. Applying Test & Measurement Methodology
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
IBIS-AMI Modeling & Correlation Methodology for ADC-Based SerDes Beyond 100Gbps
Speaker: Aleksey Tyshchenko (SeriaLink Systems)
Authors: David Halupka (SeriaLink Systems), Richard Allred (Mathworks), Tripp Worrell (Mathworks), Barry Katz (Mathworks / SiSoft), Clinton Walker (Alphawave IP), Adrien Auge (Alphawave IP)
Location: Ballroom H
Track: 02. Chip I/O & Power Modeling, 07. Optimizing High-Speed Link Design
Format: Technical Session
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Optimization of a Co-packaged Laser Module Design Using Statistical Analysis for Signal Integrity
Speaker: Junho Lee (Microsoft)
Location: Ballroom G
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Format: Technical Session
Education Level: All
Pass Type: 2-Day Pass, All Access Pass
Speakers: Seonguk Choi (KAIST), Minsu Kim (KAIST), Joungho Kim (KAIST)
Location: Chiphead Theater
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging, 09. High-Speed Signal Processing, Equalization & Coding/FEC
Format: Lightning Talk
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Speaker: Yuandong (EMC Laboratory, Missouri University of Science and Technology)
Author: DongHyun Kim (EMC Laboratory, Missouri University of Science and Technology)
Location: Chiphead Theater
Track: 13. Modeling & Analysis of Interconnects, 07. Optimizing High-Speed Link Design
Format: Lightning Talk
Theme : High-speed Communications
Education Level: Advanced
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Panel – PCIe6.0: Ingredients for Success
Speakers: Pegah Alavi (Keysight Technologies), Tim Wig (Intel Corporation), Steve Krooswyk (Samtec Inc), Rick Eads (Keysight Technologies), David Bouse (Tektronix), Madhumita Sanyal (Synopsys), Ying Li (NVIDIA), Patrick Casher (FIT-Foxconn)
Location: Ballroom D
Track: 06. System Co-Design: Modeling, Simulation & Measurement Validation, 13. Modeling & Analysis of Interconnects
Format: Panel Discussion
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Panel – Test on Wheels: Test & Measurement for Automotive Standards
Speakers: Edo Cohen (Valens), Ajeya Gupta (Ford Motor Company), Kevin Kershner (Keysight Technologies), Kirsten Matheus (BMW Group), Julien Henaut (BitifEye Digital Test Solutions GmbH)
Location: Ballroom G
Track: 07. Optimizing High-Speed Link Design, 11. Electromagnetic Compatibility & Interference
Format: Panel Discussion
Theme : Automotive
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
Panel – What is Needed for 224Gbps? System & Chip Vendors Perspective
Speakers: Cathy Liu (Broadcom Inc.), Srinivas Venkataraman (Facebook), Pirooz Tooyserkani (Cisco Systems, Inc.), Richard Ward (Intel), Pervez Aziz (Nvidia), Lars Thon (Track 9 co-chair)
Location: Ballroom H
Track: 09. High-Speed Signal Processing, Equalization & Coding/FEC, 07. Optimizing High-Speed Link Design
Format: Panel Discussion
Theme : High-speed Communications
Education Level: All
Pass Type: 2-Day Pass, All Access Pass, Expo Pass
